A self-adaptive pulse generator to realize extremely low power consumption and high reliability of high voltage gate dri

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A self-adaptive pulse generator to realize extremely low power consumption and high reliability of high voltage gate driver IC Siyuan Yu1 • Jing Zhu1 • Yangyang Lu1 • Dongdong Li1 • Yunqi Wang1 • Ziyue Xiang1 • Yunwu Zhang2 Long Zhang1 • Weifeng Sun1



Received: 8 July 2019 / Revised: 27 May 2020 / Accepted: 26 July 2020 Ó Springer Science+Business Media, LLC, part of Springer Nature 2020

Abstract A self-adaptive pulse generator featuring with short pulse width to realize lower power consumption and higher reliability of high voltage gate driver IC is proposed. Under the control of the feedback signal from the output of the high voltage level shifter, the pulse width of the input narrow pulse can be decreased adaptively without affecting the normal operating function. The proposed self-adaptive pulse generator is implemented in 100 V BCD process. Measured results show that the pulse width reduced from 211.6 to 108.3 ns, the high side operating current decreased from 175.54 to 120.53 lA at 25 °C when operations at 100 kHz, and the pulse width tend to be stable as temperature changes. Keywords HVIC  Power dissipation  Narrow pulse

1 Introduction

& Weifeng Sun [email protected] Siyuan Yu [email protected] Jing Zhu [email protected] Yangyang Lu [email protected] Dongdong Li [email protected] Yunqi Wang [email protected] Ziyue Xiang [email protected] Yunwu Zhang [email protected] Long Zhang [email protected] 1

National ASIC System Engineering Research Center, Southeast University, Nanjing 210096, China

2

Wuxi iDriver Electronic Co., Ltd, Wuxi, China

High voltage gate driver integrated circuits (HVICs) are widely used in motor control applications because of their high integration density, high efficiency, low cost, etc. [1–3]. With the different application conditions, the working environment of HVIC gets worse and more complicated, the reliability requirements of HVIC are increasing. Thus, developing a high reliability and low power consumption HVIC is critical [4]. In order to effectively drive the high side switch, a high voltage level shifter should be utilized to transmit drive signals form low voltage domain to high voltage domain, and high voltage level shifter with lateral double-diffused metal–oxide–semiconductor transistor (LDMOS) accounts for the major part of the power consumption and reliability. Several approaches to realize high voltage level shift have been proposed [5–7]. One typical circuit adopts a crosscoupled configuration is proposed in [5], it offers a simple and effective solution for realizing low to high voltage output drivers in a standard 5 V CMOS technology. However, the major drawback of this design is the static power dissipation whether the output high or low and the LDMOS need to be turn on continuous for a long time during the input signal is high, that will increase the risk of LDMOS short circuit damage. A dual narrow pulse driving scheme is

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Analog Integrated Circuits and Signal Processing

presented in [6, 7], which is the most effective way to decre