Characterization of Thin PtSI/p-Si Schottky Diodes

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J. SILVERMAN, P. PELLEGRINI, J. COMER, A. GOLVBOVIC, M. WEEKS, J. MOONEY, and J. FITZGERALD Rome Air Development Center, Hanscom AFB, MA 01731 ABSTRACT A series of PtSi on p-type Si diodes have been characterized in order to establish correlations among processing parameters, metallurgical features and electrical properties. Characterization techniques include analytical (TED, TEM), electrical (current-voltage characteristics), and optical (photoemission and absorption). The fabrication techniques involve e-beam evaporation of platinum layers at UHV levels onto VLSI grade (100) p-type silicon substrates. The silicide layers are formed via sub0 eutectic solid state diffusion at 350 C. The main trends with thickness as well as possible interrelationships are described. An unexpected result is the presence of unreacted polycrystalline Pt and Pt 2 Si at the interface. INTRODUCTION We have performed a series of analytical, electrical and optical measurements on a set of eleven PtSi/p-Si(100) Schottky diodes (2.5 - 200A Pt depositions) looking for correlations among processing parameters, metallurgical features, and electrical properties.

The diodes were fabricated

as part of a device development program on Schottky barrier photodetectors for use in

the 1-6pm rangetl].

After describing the processing and

experimental findings, we relate our results to those already in the literature and offer some speculations and conclusions (Table I summarizes salient information and results for the diodes). FABRICATION The devices were fabricated on 2 inch, p-type (100) silicon wafers (l0 1 5 cm- 3 boron concentration). A decoration etching of the surface of the chemically polished wafers indicated a dislocation density of less than 2 1 per cm . The two types of structures fabricated were: 1) two large (1cm) devices used for optical absorption, deposition uniformity measurements 3 2 and electron diffraction and 2) clusters of four small diodes (2 X 10- cm ) dispersed around the wafer used for current-voltage characterization and for internal photoemission studies. The silicon wafers undergo a denuding step followed by a field oxidation. In order to eliminate edge leakage currents, As+ n-type guard rings 0 have been implanted into the periphery of the diodes and activated at 950 C. To increase the breakdown voltage, the implant is tailored to give a pn junction with a large radius of curvature. The active diode region is defined by removal of the protective Si02 layer from the diode and half of the guard ring. After the surface is cleaned with HF, Pt metal is deposited onto the substrate in a UHV electron beam evaporator. The PtSi is formed by a sub-eutectic sintering at 350*C for 1 to 2 hours. MEASUREMENT CHARACTERIZATIONS Crystallographic The annealed films were examined by Transmission Electron Diffraction The major crystallographic phase present and Microscopy (TED and TEM).

Mat. Res. Soc. Symp. Proc. Vol. 54. '1986 Materiats Research Society

516

after annealing is PtSi for all diodes (Fig. Ia). The streaky spots indicate