Data Converters
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Data Converters
by
FRANCO MALOBERTI Pavia University, Italy
A C.I.P. Catalogue record for this book is available from the Library of Congress.
ISBN-10 0-387-32485-2 (HB) ISBN-13 978-0-387-32485-2(HB) ISBN-10 0-387-32486-0 (e-book) ISBN-13 978-0-387-32486-9 (e-book)
Published by Springer, P.O. Box 17, 3300 AA Dordrecht, The Netherlands. www.springer.com
Printed on acid-free paper
All Rights Reserved © 2007 Springer No part of this work may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written permission from the Publisher, with the exception of any material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work.
To Pina, Ame´lie, and Matteo
Contents
Dedication Preface
v xiii
1. BACKGROUND ELEMENTS
1
1.1
The Ideal Data Converter
1
1.2
Sampling 1.2.1 Undersampling 1.2.2 Sampling-time Jitter
2 10 12
1.3
Amplitude Quantization 1.3.1 Quantization Noise 1.3.2 Properties of the Quantization Noise
15 17 18
1.4
kT/C Noise
22
1.5
Discrete and Fast Fourier Transforms 1.5.1 Windowing
25 26
1.6
Coding Schemes
32
1.7
The D/A Converter 1.7.1 Ideal Reconstruction 1.7.2 Real Reconstruction
33 34 34
1.8
The Z-Transform
38
References
46
2. DATA CONVERTERS SPECIFICATIONS
47
2.1
Type of Converter
47
2.2
Conditions of Operation
48
2.3
Converter Specifications 2.3.1 General Features
50 50 vii
viii
Contents
2.4 Static Specifications 2.5 Dynamic Specifications 2.6 Digital and Switching Specifications References
51 60 72 76
3. NYQUIST-RATE D/A CONVERTERS 3.1 Introduction 3.1.1 DAC Applications 3.1.2 Voltage and Current References 3.2 Types of Converters 3.3 Resistor based Architectures 3.3.1 Resistive Divider 3.3.2 X-Y Selection 3.3.3 Settling of the Output Voltage 3.3.4 Segmented Architectures 3.3.5 Effect of the Mismatch 3.3.6 Trimming and Calibration 3.3.7 Digital Potentiometer 3.3.8 R–2R Resistor Ladder DAC 3.3.9 Deglitching 3.4 Capacitor Based Architectures 3.4.1 Capacitive Divider DAC 3.4.2 Capacitive MDAC 3.4.3 "Flip Around" MDAC 3.4.4 Hybrid Capacitive-Resistive DACs 3.5 Current Source based Architectures 3.5.1 Basic Operation 3.5.2 Unity Current Generator 3.5.3 Random Mismatch with Unary Selection 3.5.4 Current Sources Selection 3.5.5 Current Switching and Segmentation 3.5.6 Switching of Current Sources 3.6 Other Architectures References
77 77 79 80 81 82 83 85 86 89 91 94 97 97 106 107 107 110 112 113 114 114 118 121 122 124 129 131 139
4. NYQUIST RATE A/D CONVERTERS 4.1 Introduction 4.2 Timing Accuracy
141 141 143
Contents
4.2.1 Metastability error 4.3 Full-Flash Converters 4.3.1 Reference Voltages 4.3.2 Offset of Comparators 4.3.3 Offset Auto-zeroing 4.3.4 Practical Limits 4.4 Sub-Ranging and Two-Step Converters 4.4.1 Accuracy Requirements 4.4.2 Two-step Converter as a Non-linear Process 4.5 Folding and Interpolation 4.5.1 Double Folding 4.5.2 Interpolation 4.5.3
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