Effect of Different High-K Dielectrics on the Pt Nanocrystal Formation Statistics (size, density and area coverage) for
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Effect of Different High-K Dielectrics on the Pt Nanocrystal Formation Statistics (size, density and area coverage) for Flash Memory Application Abhishek Misra, Sunny Sadana, Satya Suresh, Meenakshi Bhaisare, Senthil Srinivasan, Mayur Waikar, Amit Gaur and Anil Kottantharayil Department of Electrical Engineering, Indian Institute of Technology Bombay, 400076 Mumbai, India. E-mail: [email protected] ABSTRACT We here present, metal nanocrystal (NC) formation statistics (size, density, occupancy or area coverage) on different high dielectric constant (high-K) materials which may be used as tunnel dielectric or intermetal dielectric in flash memory devices. Four important high-K materials viz. SiO2, Al2O3, HfO2 and Si3N4 are chosen for this purpose and the nanocrystal formation statistics has been found to be strongly dependent on dielectric. Among all the four dielectrics, smallest size nanocrystals with largest density are obtained on Al2O3 dielectric while on HfO2 bigger size nanocrystals are formed. This difference in nanocrystal size and density on different dielectrics is attributed to the different surface properties of these materials. INTRODUCTION Metal nanocrystal (NC) based NAND flash memories, proposed by Liu et.al [1], are being investigated for sub -22 nm node flash devices. Metals have the benefits of availability of different work functions which provides the freedom to tailor the programming/erasing and retention characteristics of the memory devices. To enable the continuous scaling of the overall flash gate stack, the use of high-K materials as tunnel dielectric in place of conventional SiO2 is also being proposed. In that case nanocrystal formation would occur on high-K dielectric and not on the SiO2 layer. Apart from this, dual layer nanocrystal memories are also studied to increase the memory window of the flash devices [2]. In this case again, the nanocrystal formation for the second layer is most likely would be on some high-K material which may be different from the bottom tunnel dielectric. Both the dielectrics will have different surface energies and different roughness, leading to the variation in NC size and density. Since NC flash memory performance strongly depends on the NC size, density, and occupancy, hence it is inevitable to study the nanocrystal formation statistics on different high-K materials which may be used as tunnel oxide or as an intermetal dielectric (in case of dual layer devices) in flash devices. The procedures available for the nanocrystal formation include colloidal, aerosol, and self assembly methods [3]. The limitation of the colloidal process is the contaminations associated with the chemical solution used for the precipitation of the NCs and hence it is not CMOS compatible. In aerosol method, NCs are formed in the gas phase condensation and fall on the substrate. Particle delivery and non uniformity in the sizes of the NCs is a concern with this method. Self assembly method is the easiest and most commonly used method for the NC formation because of its compat
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