MOCVD of GaN-based HEMT structures on 8 inch silicon substrates
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MOCVD of GaN-based HEMT structures on 8 inch silicon substrates Oleg Laboutin, Chien-Fong Lo, Chen-Kai Kao, Kevin O’Connor, Wayne Johnson, Daily Hill IQE, 200 John Hancock Road, Taunton, MA 02780, U.S.A. ABSTRACT Metal organic chemical vapor deposition, as well as material and basic device properties of nitride-based high electron mobility transistor structures on (111) silicon substrates varying in diameter from 4 to 8 inch were studied using in-situ and ex-situ characterization techniques. All substrates used for the growth of the nitride structures in this study were of SEMI standard thicknesses. The total thickness of the nitride structures was in the range of 1.5 – 5 µm. It is reported that nitride structures can be grown on 4, 6 and 8 inch diameter substrates with very similar post-growth wafer shape, material and device characteristics. It is also shown that their crystal quality, 2DEG transport properties and isolation blocking voltages can be improved by increasing nitride structure thickness while maintaining post-growth wafer bow and warp less than 50 µm. The maximum thickness of nitride structures that can be successfully grown on 8 inch diameter SEMI standard substrates seems to be limited to about 4.5 µm due to plastic deformation of Si. Blocking voltages of more than 700 V were achieved using 4.5 µm thick nitride-based high electron mobility transistor structures grown on 8 inch Si substrate. INTRODUCTION Group III nitrides have unique material properties such as high electron velocity, high breakdown electric field and high thermal stability that are very attractive for applications in RF and power electronics. A synthesis of these materials employing Si supplements their properties with low cost large diameter substrates enabling utilization of Si-based device processing capabilities. Some technological challenges in growth of nitrides on Si have to be overcome on this path. The most important and basic one is the lattice and thermal mismatch between the nitrides and Si [1]. The lattice and thermal mismatch can result in the nitride film cracking, formation of slip lines, plastic deformation in Si and post-growth wafer bow and warp [2 – 5]. Several stress management techniques have been adapted to mitigate these issues and to aid synthesis of device quality materials [6 – 10]. The applications of the nitride-based structures in power electronics demand a synthesis of thick crack-free nitride films on large diameter substrates. It has been shown that material properties such as dislocation density and device characteristics such as breakdown voltage and off-state leakage improve with increasing thickness of nitride structures grown on 4 inch diameter substrate [11]. GaN-based high electron mobility transistor (HEMT) structures have been recently grown on 8 inch diameter Si substrates [12 – 18]. Reasonable material and device properties and their uniformities across 8 inch wafers were reported. Using various stress management techniques reported in the literature, the structures were grown crack-free
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