New materials for post-Si computing: Ge and GeSn devices
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Introduction The past decade witnessed several technological breakthroughs that have played a critical role in sustaining the performance and density benefits of transistor area scaling. The development of 90-nm Si-CMOS (complementary metal oxide semiconductor) saw the introduction of strained-Si technology.1 Embedded SiGe stressors in the source/drain provided the necessary uniaxial compressive stress in the channel to improve hole mobility. For electron mobility enhancement, a silicon nitride stressor layer induced the required tensile stress in the channel. Since then, several innovations in transistor technology have been built on top of the strained-Si technology to deliver the performance benefits of transistor scaling in accordance with Moore’s law. These innovations include the use of metal gate and high-κ gate dielectric (gate insulator material with higher dielectric constant κ than SiO2) technology,2 which helps reduce the equivalent gate oxide thickness (EOT) without incurring a penalty in terms of excessive gate leakage current. Note that future technology nodes beyond 10-nm require an EOT of less than 1 nm. More recently, the migration from conventional planar transistors to nonplanar 3D transistors (tri-gate/FinFETs, where a FinFET is
a non-planar field-effect transistor in which the conducting channel is patterned into a thin fin-like structure) has enabled further device scaling by providing good electrostatic control of the transistor channel and mitigating the short-channel effects.3,4 As a result, tri-gate/FinFET transistors show reduced leakage compared with their planar counterparts. As the search continues for technological solutions that can extend the life of Moore’s law beyond Si-CMOS, several options are under investigation that promise to deliver the performance benefits of further device scaling.5 Alternate channel materials such as III–V and Ge that show higher electron and hole mobilities compared to Si are being considered for future technology nodes. High channel mobility improves the MOSFET (metal oxide semiconductor fieldeffect transistor) on-current, reducing the transistor switching delay. This enhancement in the drive current also allows for further reduction in the supply voltage, thereby reducing the active switching power consumption. High electron mobility III–V channel materials such as InGaAs, co-integrated with materials such as SiGe and Ge that show high hole mobility, have been touted as one of the more feasible routes for realizing the next generation of CMOS devices. III–V based
Suyog Gupta, IBM T.J. Watson Research Center, USA; [email protected] Xiao Gong, Electrical and Computer Engineering, National University of Singapore, Singapore; [email protected] Rui Zhang, Department of Information Science and Electronic Engineering, Zhejiang University, China; [email protected] Yee-Chia Yeo, Electrical and Computer Engineering, National University of Singapore, Singapore; [email protected] Shinichi Takagi, Department of Electrical Engineering and Information Systems, Unive
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