On the Influence of Illumination During Ion Damage Defect Anneal of Silicon
- PDF / 424,073 Bytes
- 6 Pages / 414.72 x 648 pts Page_size
- 43 Downloads / 228 Views
Mat. Res. Soc. Symp. Proc. Vol. 396 ©1996 Materials Research Society
much more involved defect interaction with deep levels arising after subsequent thermal anneal[6]. In either case the role of illumination during thermal anneal can be readily monitored with deep level transient spectroscopy (DLTS). To screen the effect of (super-bandgap) light during RTA, we used the simple expediency of placing the Arimplanted/ECR hydrogenated chips one face up and one face down vis-a-vis the RTA lamp source. Further control experiments were also performed with conventional furnace anneal. EXPERIMENT The wafers used in this study were both CZ and epitaxial boron-doped p-type and epitaxial phosphorous-doped n-type (100) Si. The n-type epi wafers were 12 PIm thick and had a resistivity of 4.5 Q-cm, while the corresponding values for p-Si were 17 i[m and 40 2-cm respectively. A Varian 350D ion implanter was used to implant the Si with Ar at 25 keV over the dose range 1012 - 1016 cm- 2. The wafers were cut into roughly 1 cm x 1 cm pieces for subsequent processing. RTA to monitor defect anneal was carried out in an AG Associates HeatPulse 210T system - with the implanted sides placed face-up and face-down relative to the tungsten-halogen lamps - at 600, 700 and 800 °C for 10 min. For comparison, conventional fumace anneals were done on similar samples at 800 C for 10 and 60 min. The ECR hydrogenation was performed at a plasma power of 600 W for 40 min. under an H2 flow rate of 2.8 sccm at 1.5 x 10-4 torr, with no intentional heating of the substrate. The post-hydrogenation anneal that activates the latent defects in ECR-hydrogenated Si was done at 500 oC for both RTA and conventional furnace anneal. The choice of this temperature was based on our earlier study, where the DLTS peaks were found to have maximum values at around this temperature [6]. The RTA durations were 5, 10, 20, 30, 60 and 600 s, while the furnace anneal times were 10 and 30 min. respectively. Suitable Schottky (Au for n-Si and Ti/Al for p-Si) contacts were deposited through shadow masks by thermal evaporation on the implanted/hydrogenated sides of the chips after removing the native oxide layer with an HF dip. Ohmic back contacts were formed on the entire back sides of the chips by interchanging the evaporation metals. The electrical characterization of the Schottky diodes included the currentvoltage (I-V), capacitance-voltage (C-V) and DLTS measurements. We will focus principally on the DLTS data here since the DLTS peaks offer the most sensitive indication of the defects created/passivated by the various treatments. Selected samples were also characterized by cross-sectional transmission electron microscopy (TEM) for structural information on the defects and secondary electron mass spectroscopy (SIMS) to assess the hydrogen content; to enhance the detection sensitivity of the latter deuterium was substituted for hydrogen. RESULTS The p-Si samples that were implanted with 25 keV Ar at various doses exhibited only marginal differences in the DLTS signals detected
Data Loading...