Thermal Budget Reduction for Back-end Compatibility and Control of Resistance Switching Mechanism (Unipolar to Bipolar)
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Thermal Budget Reduction for Back-end Compatibility and Control of Resistance Switching Mechanism (Unipolar to Bipolar) in Pr1-xCaxMnO3 (PCMO) RRAM Neeraj Panwar 1, Gurudatt Rao 2, N. Ravi Chandra Raju 1, Rajashree Nori 1, Pankaj Kumbhare 1, Sanchit Deshmukh 1, Senthil Srinivasan V S 1, N. Venkataramani 2 and Udayan Ganguly 1 1
Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai400076, India. 2
Department of Metallurgical Engineering and Materials Science, Indian Institute of Technology Bombay, Mumbai-400076, India. ABSTRACT A low thermal budget process for back-end compatible PCMO based RRAM cell is essential for 3D stacked memory. In this paper, we investigate two strategies to engineer low thermal budget processing for bipolar switching - (i) deposition engineering i.e. based on deposition temperature and oxygen partial pressure, (ii) post deposition anneal i.e. based on inert anneal of room temperature deposited PCMO film.. We demonstrate that both deposition and anneal shows a transition temperature above which bipolar switching is realized. Oxygen partial pressure is a key deposition process parameter. As oxygen partial pressure is reduced memory window increases, however beyond an optimal O2 partial pressure, unipolar switching is observed. Inert anneal is more effective in thermal budget reduction as N2/550°C/2min anneal has same memory performance as 650°C/2hour deposition process. INTRODUCTION Stacked RRAM technology is attractive for memory chips as well as embedded applications and requires back-end compatible process [1]. Bipolar switching currents in manganites are area-scalable and hence set/reset current can be reduced with scaling to advanced nodes [2, 3]. Among manganites, Pr1-xCaxMnO3 (PCMO) based Resistance RAM (RRAM) shows consistent bipolar memory performance with high (>650°C) deposition [4, 5] with some evidence of unipolar switching (T >300°C) [6, 7]. A challenge is to reduce the PCMO deposition temperature without compromising the memory performance for back-end compatible stacked embedded memory. In this paper, we investigate the effect of deposition temperature and oxygen partial pressure, and compare with post deposition inert anneal of low temperature deposited film to demonstrate bipolar RRAM characteristics at reduced thermal budgets. EXPERIMENT The Bottom electrode (BE) of ~9nm Ti and ~60nm Pt was sputtered on SiO2/Si substrate. Next, various PCMO films were deposited by Pulsed Laser Deposition (PLD) using PCMO
target. The SEM of the thin film stack is compared with the schematic of the device structure in figure 1 The XRD of PCMO target is shown in figure 2 to confirm the composition [8]. The PCMO films deposition and post deposition anneal (PDA) are summarized in table 1. The effect of 3 process parameters- deposition temperature and oxygen partial pressure (pO2), and inert (N2) anneal temperature is investigated on resistive switching type (bipolar vs. unipolar) and performance (e.g. memory window). Agilent B1500A Semiconductor Device Analyzer w
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