Scanning Photocurrent Microscopy of as-Grown Silicon Nanowire Metallurgical Junctions
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Scanning Photocurrent Microscopy of as-Grown Silicon Nanowire Metallurgical Junctions 1,2
Mark Triplett, 1 2
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M. Saif Islam, Dong Yu
Department of Physics, University of California, Davis, California 95616, USA
Department of Electrical and Computer Engineering, University of California, Davis, California 95616, USA ABSTRACT During the epitaxial bottom up growth of nanowire (NW) arrays, occasional kinks in growth direction can lead to intersecting and consequently self-welded crystalline connections between NWs. In order to study these self-welded metallurgical NW junctions, a NW bridge device architecture which requires no post-growth processing was used to grow and stabilize Si NW junctions. Scanning Photocurrent Microscopy (SPCM) was used to study the optoelectronic properties of the NW junctions as well as the characteristics of the NW bridge devices. SPCM measurements show a bias dependent photocurrent (PC) response at the NW junction indicating local band bending at this location. A decay of the PC response away from the junction is also seen in the secondary NW channel ensuring an electrical connection. These junction properties may be important for ensemble NW optical devices. INTRODUCTION
Nanowires (NWs) are interesting candidates for many technological areas and industrial applications and have therefore been investigated widely over the last decade. NW arrays, grown via a bottom up process, are used for many different research applications including nanoscale field-effect transistors (FETs), p–n junction diodes, light emitting diodes (LEDs), bipolar junction transistors,[1] lasers,[2] chemical and biological sensors, batteries,[3] thermoelectric devices,[4] and many others. Epitaxial vapor liquid solid (VLS) grown NWs typically grow normal to a crystalline growth surface which can be oriented at any starting angle to direct the growth. Two typical orientations, which are conveniently obtained using micro fabrication methods, are horizontal or vertical growth. Si NW arrays are commonly grown on horizontal surfaces for later processing into devices, but we have also demonstrated growth from prepatterned vertical Si electrode surfaces.[5] In this case a seed layer (Au) is deposited onto the vertical (111) Si surface and NWs grow horizontally until they encounter the opposite sidewall at which point the NWs self-weld to the opposite electrode, creating an electrically and mechanically robust crystalline connection. Forming connections during the NW growth process provides a facile method of making robust connections between nanowires and microscale structures, which can be developed into electrodes for nanoelectronic and photonic devices.
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Figure 1b and 1c show a schematic and scanning electron microscopy (SEM) image, respectively, of the bridge device architecture created using this form of growth. The selfwelding process is mediated by the Au-Si alloy seed particle which spreads slightly after contact and allows the formation of a firm electrical and mechanical connection. VLS grown NWs also o
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