Self-aligned TiSi2/Si Hetero-nanocrystal Nonvolatile Memory
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0997-I02-05
Self-aligned TiSi2/Si Hetero-nanocrystal Nonvolatile Memory Yan Zhu, Bei Li, and Jianlin Liu Department of Electrical Engineering, University of California, Riverside, 900 University Ave, Riverside, CA, 92521 ABSTRACT This work describes a novel nonvolatile memory device with self-aligned TiSi2/Si heteronanocrystal charge storage nodes. The TiSi2/Si hetero-nanocrystals can be readily fabricated using industrial standard self-aligned silicidation technique based on Si nanocrystals deposited on ultra-thin tunnel oxide with LPCVD. As compared with a Si nanocrystal memory device, a TiSi2/Si hetero-nanocrystal memory device exhibits faster programming and erasing, and longer retention time. INTRODUCTION Because of the immunity to local leakage points, Si nanocrystal as discrete floating gate in nonvolatile MOSFET memory devices has been extensively investigated [1, 2]. The issue of defect-related traps in Si nanocrystals as reported in [2] has led to device thermal instability. One alternate is to use nanocrystals that form deeper trap depth, such as Ge [3] and metal [4-7] dots so that the retention performance can be significantly improved. However, it has been reported [7] that some material will react with tunnel oxide and degrade device performances. In this work, we will report our work on self-aligned silicide/Si hetero-nanocrystal memories. Silicide/Si hetero-nanocrystal has the advantages of having deeper quantum well than semiconductor dots and better thermal stability than metal dots. EXPERIMENTAL DETAILS 5-nm-thick thermal oxide was grown on a chemically cleaned 4′′ p-type Si at 850 ∞C. It was then annealed in nitrogen at 900 ∞C for 30 s before the nanocrystal deposition to release the stress and densify the oxide layer. Si nanocrystals were grown at 600 ∞C for 10 s with the SiH4 pressure of 136 mtorr in a Low Pressure Chemical Vapor Deposition (LPCVD) system. The TiSi2/Si hetero-nanocrystals were fabricated with a two-step silicidation method. First a 2-nmthick (nominal) blanket metal Ti was deposited onto the sample. The first annealing was performed subsequently in nitrogen at 750 ∞C for 20 seconds. The unreacted Ti metal on top of nanocrystals as well as in-between nanocrystals was removed in selective etchant (NH4OH: H2O2: H2O=1:1:5). Discrete TiSi2/Si hetero-nanocrystals with the same dot density as original Si nanocrystals were formed in this stage. The second annealing was performed at 880 ∞C for 30 seconds after the metal removal to form more thermally robust TiSi2 dots on Si dots. The thickness of TiSi2 part can be controlled by either adjusting the annealing time or adjusting the deposited metal Ti thickness. In our case, we limited the Ti thickness so that the ultimate TiSi2 is also limited. This method is better than to adjust the annealing time since the latter requires complex process calibration. After silicidation, control oxide of about 15 nm was deposited, followed by a 350-nm-thick poly-Si deposition in LPCVD. The poly gate and source/drain regions were heavily implanted with p
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