TCAD Modeling and Simulation of Sub-100nm Gate Length Silicon and GaN based SOI MOSFETs
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0913-D05-09
TCAD Modeling and Simulation of Sub-100nm Gate Length Silicon and GaN Based SOI MOSFETs Lei Ma1, Yawei Jin1, Chang Zeng1, Krishnanshu Dandu1, Mark Johnson2, and Doug William Barlage1 1 Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC, 27695 2 Department of Material Science and Engineering, North Carolina State University, Raleigh, NC, 27695
ABSTRACT Sub-100nm gate length silicon and GaN based SOI n-type MOSFET are modeled and simulated using ISE-TCAD (now synopsys_sentaurus). Several silicon SOI structures such as planar fully depleted SOI, FinFET, Tri-Gate MOSFET, cylindrical channel (OMFET) and triangular channel MOSFETs have been studied to compare the structure dependence of the device performance. Silicon and GaN as channel materials are also compared for these different SOI structures for projecting the device performance for very short channel SOI MOSFETs. Our study shows that for sub-100nm gate length, GaN based transistors have better Ion/Ioff ratio and higher small signal transconductance than silicon based transistors. And GaN and Si based devices have comparable performance such as sub-threshold slope and threshold roll off, etc. However for sub 20nm gate length, simulation shows that while it is not satisfying for silicon based device for digital applications, GaN based transistors with lower off state leakage current, less short channel effect than Silicon based transistors are still good candidates for digital applications . The TCAD study shows that GaN could be a promising candidate for making very short channel device as the GaN processing technology is advancing. INTRODUCTION Silicon MOS transistors have been scaled down fro over 30 years, and the gate length has reached sub-90nm in products and 5nm in the research level. Several different silicon on insulator (SOI) structures such as FinFET [1, 2], Trigate [3, 4], and Omega-field-effect transistor (OFET) [5, 6] devices have been receiving attention as potential device candidate for nanoscale silicon MOSFET. The FinFET structure we are going to study is one type of vertical double gate SOI structure, the channel is surrounded by the two thin layer of oxide as gate oxide and the top thick layer of insulator as shown in Fig. 1. The TriGate structure is also called triple gate structure looks like FinFET but the top gate oxide is also very thin so the channel is surrounded by three oxide layers as shown in Fig. 2. The Omega-FET is the structure where the channel can be further wrapped around by the gate oxide layer, the extreme case of the OFET structure is the cylindrical channel fully wrapped around by the gate oxide as shown in Fig. 3. The triangular channel MOSFET structure is on kind of double gate SOI structure, but the cross section view of the channel is not in a traditional rectangular shape but in the triangular shape as shown in Fig. 4. All of the above mentioned SOI structures have been proposed and the simulation work has been
done individually. However the structure comparis
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