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Abstract We fabricated top gate TFTs of microcrystalline silicon (pc-Si) deposited at 360 "C. The TFTs have field-effect electron mobilities of up to 7.9 cm 2/Vs in the saturation regime and 5.8 cm 2/Vs in the linear regime. The highest IoN/IoFF ratio is 105. Typical values for V" is 6.5 V and for the subthreshold slope is 1.7 V/decade. The p[c-Si is grown by PE-CVD from a source gas mixture of SiH 4, SiF4 and H 2, with a typical flow ratio of 1:20:200, at a pressure of 120 Pa and a power density of 160 mW/cm2 . The TFT structure is built on un-passivated Coming 7059 glass, with 300 nm pc-Si, 60 nm n* pc-Si source and drain contact layers, 200 nm SiO2 or 300 nm SiN, gate insulator, and 100 nm Al gate, source and drain electrodes. Introduction Silicon thin film transistors (TFTs) are widely used in large-area electronics. a-Si:H TFTs are employed as the switching devices for pixels in active matrix liquid crystal displays (AMLCDs) and polycrystalline Si (poly-Si) TFTs are used for switches and driver electronics of AMLCDs. However, the high crystallization temperatures of 600'C employed for poly-Si TFTs motivate the search for an alternative CMOS-capable Si TFT technology. High carrier mobility and the capability for bipolar/CMOS circuits are the two principal motives for developing silicon thin film transistors with microcrystalline silicon (iic-Si) channels. Because direct deposition typically is conducted at the relatively low temperature of plasma-enhanced CVD for a-Si:H, it is

an attractive alternative for preparing the microcrystalline silicon film [1][2]. The low temperature of typically 300'C makes pc-Si accessible to a wider variety of substrates than furnace and rapid thermal annealing. pc-Si also retains the advantages of a-Si:H such as good film uniformity over large deposition areas. Therefore, pc-Si TFTs are promising for making both driving and switching circuits for large area displays. Transistors made from directly deposited pc-Si have been reported over the years [3][4][5]. But none of them have yet suggested a practical technology, so that further research needed to be carried out to improve the TFT performance. Using the conventional PE-CVD technique, we fabricated pc-Si TFTs with a top gate structure. We used both SiN, and SiO 2 as the gate insulators. The TFTs have saturated mobilities up to 7.9 cm 2/Vs and linear mobilities up to 5.8 cm 2/Vs. The highest IoN/oT ratio is 10'. Typical values for V,, is 6.5 V and for the subthreshold slope is 1.7 V/decade. Experimental procedures The pc-Si films were grown on unpassivated 1"x 3" Coming 7059 glass slides with a thickness of 1.1mm. The glass slides were cleaned with the MICRO series 8790 glass-cleaning fluid (International Products Corporation) before deposition. The film growth conditions are 665 Mat. Res. Soc. Symp. Proc. Vol. 557 ©1999 Materials Research Society

listed in Table I. The pc-Si layers were deposited using DC-excited PE-CVD from a gas mixture of SiH 4, SiF,, and H2. Adding SiF, to the source gas for pc-Si deposition provides a la