Stability of Amorphous Silicon Thin Film Transistors

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capacitance measurements on our samples independently carried out by Kleider et al. [3] confirm these results. Moreover, we observe that charge trapping is characterized by a weak temperature dependence, while state creation is a thermally activated process [4]. In a recent report [5], we have analyzed the effect of the deposition conditions on the mobility of the devices, focussing on the two different plasma regimes: the sheath heating or aX-regime, and the plasma-bulk Joule heating or y'-regime. In the present paper, we extend this analysis to the stability of these a-Si:H TFTs. SAMPLE PREPARATION The depositions were made in an ANELVA IL V-9104 PECVD reactor with a RF frequency of 13.56 MHz. The material properties of the samples have been studied in addition to those in Ref 5 by exo-diffusion and stress measurements. Exo-diffusion has been carried out on 1 Am a-Si:H flakes with a heating ramp of 6 K/min. The response of the system used in the dynamic mode was calibrated using similar samples to those measured, with known hydrogen content previously determined by static mode exo-diffusion and cross-checked by elastic recoil detection (ERD). The total stress of the a-Si:H thin films has been determined by the change of angle of reflection of a laser beam as it is scanned across the sample. For room-temperature measurements a 400nm thick a-Si:H film is deposited on Schott D263, whereas for the temperature dependent measurement the films were deposited on 6" silicon wafers (100). The heating ramp was 0.5 K/min and the maximum temperature was set to about 20'C below deposition temperature. Transfer characteristics and bias stress experiments have been carried 365 Mat. Res. Soc. Symp. Proc. Vol. 557 © 1999 Materials Research Society

out on n-type, bottom gate, back channel etch a-Si:H TFTs with a silicon-nitride gate insulator (d,.= 300 nm, c,= 6.4), an intrinsic a-Si:H layer of about 160nm and an n+ layer of about 50 nm. The deposition recipes for the a-Si:N:H and the n+ a-Si:H layer were the same for all TFTs, except that the deposition temperature was adjusted to be the same as that of the amorphous silicon. The mobility was measured at 30'C in the saturated regime (VSD = 20V) from longchannel TFTs in order to ensure that the results were not limited by the contacts. The threshold voltage shifts were determined in the linear regime (VsD = 0.25 V) for different stressing times and at different temperatures. The stress voltage has been fixed to be 1 MV/cm over the initial threshold voltage. Experimentally, the most stable TFTs with reasonable mobility have been reported at a deposition temperature around 300'C in the y'-regime for PECVD deposition [5,6]. However, for lower temperatures, the situation is more complicated as shown in Figures l(a) and 1(b). Here, we have plotted for a deposition temperature of 240'C the results for the different deposition conditions (pressure and dilution) as a function of the growth rate, which distinguished between the two regimes [5,7]. Whereas the mobility is about constant in

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