Thin Single Crystal Silicon on Oxide by Lateral Solid Phase Epitaxy of Amorphous Silicon and Silicon Germanium
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Thin Single Crystal Silicon on Oxide by Lateral Solid Phase Epitaxy of Amorphous Silicon and Silicon Germanium Brian J. Greene, Joseph Valentino1, Judy L. Hoyt2, and James F. Gibbons Solid State Electronics and Photonics Laboratory, Stanford University, Stanford, CA 94305 1 Present Address: Dept. of Electrical Engineering, Villanova University, Villanova, PA 19085 2 Present Address: Microsystems Technology Laboratory, MIT, Cambridge, MA 02139 ABSTRACT The fabrication of 250 Å thick, undoped, single crystal silicon on insulator by lateral solid phase epitaxial growth from amorphous silicon on oxide patterned (001) silicon substrates is reported. Amorphous silicon was grown by low pressure chemical vapor deposition at 525ºC using disilane. Annealing at temperatures between 540 and 570°C is used to accomplish the lateral epitaxial growth. The process makes use of a Si/Si1-xGex/Si stacked structure and selective etching. The thin Si1-xGex etch stop layer (x=0.2) is deposited in the amorphous phase and crystallized simultaneously with the Si layers. The lateral growth distance of the epitaxial region was 2.5 µm from the substrate seed window. This represents a final lateral to vertical aspect ratio of 100:1 for the single crystal silicon over oxide regions after selective etching of the top sacrificial Si layer. The effects of Ge incorporation on the lateral epitaxial growth process are also discussed. The lateral epitaxial growth rate of 20% Ge alloys is enhanced by roughly a factor of three compared to the rate of Si films at an anneal temperature of 555°C. Increased random nucleation rates associated with Ge alloy films are shown to be an important consideration when employing Si1-xGex to enhance lateral growth or as an etch stop layer. INTRODUCTION Thin film silicon on insulator fabrication is an increasingly important technology requirement for improving performance in next generation devices and circuits. One process for SOI fabrication which has recently been generating renewed interest is Lateral Solid Phase Epitaxy (LSPE) of silicon over oxide. This process involves annealing amorphous silicon that has been deposited on oxide patterned Si wafers. The (001) Si substrate forms the crystalline seed for epitaxial growth. This technique permits the generation of Si films that are both single crystal, and oriented to the substrate. This method is particularly attractive to fabrication that requires low temperature processing, because the Si films are deposited in the amorphous phase at temperatures near 525°C, and crystallized at temperatures near 570°C. It is also attractive for applications requiring three dimensional stacking of active silicon device layers, due to the relatively low temperatures involved. For sub-50 nm gate length MOSFET fabrication, an SOI thickness on the order of 10 nm will be required. Previous work on LSPE has shown significant faceting and a lack of a well
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Random Nucleation
Random Nucleation
Substrate Seed 10 µm
LSPE SOI
Substrate Seed 10 µm
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Figure 1. Plan view Nomars
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