Tunable Workfunction with TaN Metal Gate on HfO 2 -Hf x Si y O Dielectrics
- PDF / 56,988 Bytes
- 5 Pages / 612 x 792 pts (letter) Page_size
- 100 Downloads / 193 Views
D4.3.1
Tunable Workfunction with TaN Metal Gate on HfO -Hf Si O Dielectrics 2
x
y
Christopher S. Olsen, Philip A. Kraus, Khaled Z. Ahmed, Shreyas Kher, Steven Hung, Nety Krishna, Jeff Chen, Lucien Date, and Marc Burey, Jason Campbell Applied Materials, Sunnyvale, CA 94086 USA Ching-Huang Lu, Michael Deal, Yoshio Nishi Center for Integrated Systems, Standford University, Palo Alto, CA 94306 USA
Abstract MOS capacitors were fabricated from MOCVD HfO 2 and Hfx Siy O gate dielectrics with ALD TaN / PVD Ta metal electrodes. Dielectrics with 1.8 to 2.6 nm capacitance equivalent thickness (CET) were investigated with gate leakage (Jg ) of 1x10-7 to 1x10-3 A/cm2 at Vg= Vfb-1V in accumulation. In addition to the C-V and I-V characterization of the MOSCAPs, XPS physical characterization was performed on monitor wafers to determine composition and physical thickness. From the combined results of the electrical and physical characterization, the relative dielectric constants of the Hf-Si-O films and the metal electrode work functions are determined, and simple models for the compositional dependence of the dielectric constant are formulated. Capacitors with the same dielectric composition and thickness exhibited 100 mV Vfb change when the thickness of the ALD TaN electrode layer was changed from 40-80Å. This change is attributed to a change in the work function of the aggregate TaN / Ta metal electrode. Workfunctions were found to be located near middle of the Si band gap, with workfunctions of 4.6 eV to 4.7 eV. Introduction
For sub-65nm node CMOS gate dielectrics, implementation of high-k materials may occur with metal gate electrodes to solve the polycrystalline Si electrode depletion issues. Choice of metal electrodes with a given dielectric must achieve proper threshold voltage on both NMOS and PMOS devices, and display sufficient thermal stability during source/drain activation anneals at greater than 1000°C for a conventional process flow. To set both NMOS and PMOS threshold voltages on bulk Si, this process requires dual workfunction metals. The ability to tune the workfunction with bilayer stack structure has been demonstrated before in the Al- TaN system, although the charge transfer mechanism in the metal electrodes proposed is inconsistent with Gauss’ law if both materials are true metals [1]. In addition to bilayer stacks, Rande et al. have demonstrated Mo workfunction tuning with Ar and N implantation [2]. Samavedam, et al. demonstrated dual metal gate integration with TiN and TaSiN, but required etching TiN the down to the dielectric, which could degrade the dielectric reliability and cause Tox,inv variations in manufacturing [3]. In this work we present a preliminary TaN/Ta tunable metal gate stack with workfunction near mid gap threshold voltage tuning. A mid- gap single electrode may only be useful in fully-depleted SOI application. Ideally, the work function tuning range should extend from 4.2 to 5eV, near the band edges of Si, to be able for appropriate threshold voltages for implementation into a bulk
Data Loading...
