Two-Dimensional Simulations of Current Flow in Amorphous Silicon Thin-Film Transistors

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TWO-DIMENSIONAL SIMULATIONS OF CURRENT FLOW IN AMORPHOUS SILICON THIN-FILM TRANSISTORS J.G. SHAW and M. HACK Xerox Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304

ABSTRACT Whereas one-dimensional models can adequately predict the current-voltage behavior of ideal thin-film transistors, a detailed study of current flow requires a comprehensive two-dimensional simulation. Such an analysis provides important information regarding effective series resistance, overlap capacitance, and currentcrowding near electrodes. Numerical simulations also allow the rapid development and optimization of new devices. We have developed a two-dimensional finite-element device simulator (MANIFEST) which we have used to study the effect of source-to-gate misalignments on the performance of amorphous-silicon TFTs. We find that submicron source-togate gaps do not seriously impair TFT performance. INTRODUCTION Computer programs which simulate the behavior of single-crystal semiconductor devices have been available for several years. These tools, based on finite-difference [1,21 and finite-element [3,4] methods, have proved to be invaluable for conventional device design and optimization. In this paper, we present results from a finite-element device simulator that we have developed to solve the electronic transport equations for amorphous-silicon (a-Si:H) thin-film transistors (TFTs). Such devices have become popular as circuit elements in numerous applications involving large-area electronics such as liquid-crystal displays [5] and page-wide print-copy-scan heads [6]. Our MANIFEST program tackles this problem by finding a numerical solution to the following set of partial differential equations: V(eVy) = -qIp--n+p

t-nt+N d- N

V(DnVn - P nVy)

R n-Gn

+ an

(2)

V(DpVp + PpppVt))

R -Gp+

ap

(3)

at

(1)

where: e is the permittivity of the semiconductor; q is the charge of an electron; w is the electrostatic potential; n, p are the concentrations of free electrons and holes; nt, Pt are the concentrations of trapped electrons and holes; Nd-Na represents the net concentration of dopants; pn, pp are the band mobilities of electrons and holes; Dn, Dp are the diffusion coefficients of electrons and holes; and Rn, Rp (Gn, G ) are suitable recombination (generation) expressions. In an insulator, only Lapface's equation need be solved. With regard to device physics, the feature of a-Si:H that distinguishes it from crystalline silicon is the relatively large concentration of charge trapped in defect states within the band gap. Even in device-quality material, the concentration of trapped charge may be many orders of magnitude larger than the corresponding free charge. The unique problems associated with modelling a-Si:H transistors stem largely from the trapped-charge terms in equation (1).

Mat Res. Soc. Symp. Proc. Vol. 118. '1968 Materials Research Society

226

DENSITY-OF-STATES MODELLING To simplify the numerical solution of the transport equations, we must interrelate the free and trapped charge densities. By integr