Via Electromigration Lifetime Improvement of Aluminum Dual-Damascene Interconnects by Using Soft Low-k Organic SOG Inter

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Via Electromigration Lifetime Improvement of Aluminum Dual-Damascene Interconnects By Using Soft Low-k Organic SOG Interlayer Dielectrics Hisashi Kaneko, Takamasa Usui, Sachiyo Ito and Masahiko Hasunuma Process & Manufacturing Engineering Center, TOSHIBA Corp. 8, Shinsugita-cho, Isogo-ku, Yokohama-city, 235-8522, JAPAN [email protected] ABSTRACT The via electromigration(EM) reliability of aluminum(Al) dual-damascene interconnects by using Niobium(Nb) new reflow liner is described. It has been found that the via EM lifetime was improved by introducing low-k organic spin on glass(SOG)-passivated structure than the conventional TEOS-SiO2/SiN-passivated structure. Higher EM activation energy of 1.08 eV was obtained for the SOG-passivated structure than the conventional TEOS-passivated structure of 0.9 eV, even though no significant Al micro-crystal structure difference was found for both structures. It has been turned out that the low-k SOG material has the 1/7 Young's modulus (8 GPa) of TEOS-SiO2 (57 GPa) or thermal SiO2 (70 GPa). The small Young's modulus means that SOG is more elastically deformable and/or softer than TEOS or thermal SiO2. This elastic deformation of the low-k SOG could retard the tensile stress evolution due to the Al atom migration near the cathode via, and elongated the time until the Al interconnect tensile stress exceeds the critical stress value for void nucleation. It has been concluded that the small-RC and reliable multi-level Al interconnect can be realized by the Nb-liner reflow-sputtered process with soft and low-k SOG dielectric materials. INTRODUCTION The dual-damascene multi-level interconnect process realizes the planarized metal/insulator surface at each level for keeping depth of focus margin for lithography, and has potential for the process cost down[1]. The key technology for the Al dual-damascene process is the superior hole and trench filling capability with least effective interconnect resistance increase. This filling capability strongly depends on the choice of the liner material for the sputter reflow[2]. By using the Niobium(Nb) liner, the filling capability of aspect ratio of 7.5 with φ0.17 µm via opening, and 30% decrease in the effective resistance than the conventional Ti liner could be achieved[3]. For high performance ULSIs, on the other hand, the reduction of the parasitic wiring capacitance or RC delay is highly necessary[4]. The low-k SOG dielectrics[5] and/or polyimide are the promising candidate for the inter layer dielectric (ILD) materials for smaller parasitic capacitance. However, the reliability knowledge about the Al damascene and/or dual damascene structure has been limited to the Al micro-crystal structure and texture studies[6-9], or the Al extrusion phenomena due to the poor mechanical properties of low-k materials[10,11]. In this paper, a reliability impact on the via EM phenomena of the Al dual damascene structure by using the low-k SOG material with dielectric constant of 2.5[5], and the conventional TEOS as the passivation has been studie