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Abstract At a high-pace advancements in the technologies today and their ubiquitous use, speed and size, has been the important aspects in VLSI interconnect. Channel length of device decreases to tens of nanometers, as the technology is shifting to the deep submicron level. Hence, the die size and device density of the circuit increase rapidly. This increase makes the requirement of long interconnects in VLSI chips. Long interconnects lead to increase in propagation delay of the signal. In deep submicron meter VLSI technologies, it has become increasingly difficult for conventional copper-based electrical interconnects to gratify the design requirements of delay, power, and bandwidth. Promising candidate to solve this problem is carbon nanotube (CNT). In this paper, the prospects of carbon nanotubes (CNT) as global interconnects for future VLSI Circuits have been examined. Due to high thermal conductivity and large current carrying capacity, CNTs are favored over copper as VLSI future interconnects. The energy, power, propagation delay, and bandwidth of CNT bundle interconnects have been examined and compared with that of the Cu interconnects at the 32-nm technology node at two different global interconnects lengths. The simulation has been carried out using HSPICE circuit simulator with a transmission line model at 200 and 1000 μm lengths. The results show that power consumption and energy of CNT-based interconnects are reduced by 66.49 and 66.86 %, respectively, at 200 μm length in comparison with the Cu-based Interconnects. At 1000 μm length, a reduction of 43.90 and 44.04 % has been observed in power consumption and energy, respectively, using CNT interconnects. Furthermore, the propagation delay is reduced approximately 61.17 % for 200 μm and 69.13 % for 1000 μm length while the bandwidth increases

Arti Joshi (&) Poornima University, Jaipur, India e-mail: [email protected] Gaurav Soni EEE, Poornima University, Jaipur, India e-mail: [email protected] © Springer Science+Business Media Singapore 2016 M. Pant et al. (eds.), Proceedings of Fifth International Conference on Soft Computing for Problem Solving, Advances in Intelligent Systems and Computing 436, DOI 10.1007/978-981-10-0448-3_35

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Arti Joshi and Gaurav Soni

up to 90 %. This work suggests single-wall carbon nanotubes (SWCNT) bundle interconnects for global interconnects in VLSI designing as they devour low energy and are faster when compared with conventional copper wires. Keywords Copper


SWCNT
Global interconnects
Power
Energy

1 Introduction Due to advances in technology scaling, today’s ICs are composed of billions of transistors. Interconnects in these transistors were treated as optimal conductors that proliferated signals instantaneously [1]. They are used to associate components on a VLSI chip, connect chips on a multichip module, and connect multichip modules on a system. While device sizes were timiding with every technology, the multilevel metal structures raised superior above the surface of the silicon a