Exploration of Amorphous Silicon Thin Film Transistor Degradation with Thermal Anneal
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EXPLORATION OF AMORPHOUS SILICON THIN FILM TRANSISTOR DEGRADATION WITH THERMAL ANNEAL R.F. Kwasnick*, G.E. Possin*, and W.L. Hill II** *GE Corporate Research and Development Center, P.O. Box 8, Schenectady, NY 12301 "**Present Address: North Carolina State University, Department of Electrical and Computer Engineering Department, Raleigh, NC 27695 ABSTRACT We have measured the device characterisics of short and long channel invertedstaggered hydrogenated amorphous silicon thin film transistors (TFTs) with either Mo or Cr source/drain metal after annealing at temperatures from 225 C to 275 C. The TFT deposition temperature at the substrate surface was about 270 C. From the slope of the transfer characteristic an effective mobility is extracted. Devices with Mo source/drain metal exhibit an initial effective mobility increase at short times (within about 30 min), while those with Cr do not. At long times the mobility of all devices decreases. The mobility changes are greatest for short channel length devices because of contact effects. The channel length dependence of the behavior permits a separation of the device behavior into contact and intrinsic mobility components. INTRODUCTION In some hydrogenated amorphous silicon (a-Si:H) processes, a-Si:H thin film transistors (TFTs) formed early in the process may be exposed to temperatures approaching, and possibly even exceeding, the TFT deposition temperature, which is generally above 250 C. For example, the deposition of a passivating dielectric layer or of subsequent device structures is generally at temperatures at or above 200 C. We report here on TFT performance degradation after anneal at temperatures as low as 225 C. Bias-stressed TFTs have been shown to recover their original characteristics after anneals at 180 C [11, so it is interesting that temperatures not much higher than that can cause device degradation. At low drain voltage (Vd) and low gate voltage (VG) the drain current (Id) of an a-Si:H TFT can be well-described by: Id =jW/L C (VG-Vt)Vd,
(1)
where [t is the effective mobility. The standard derivation of Eqn. (1) ignores contact effects but experimentally even very short channel length devices with large contact voltage drops are well-described by this equation at a few volts above threshold. We characterize contact effects as a contact voltage drop Vc between each metal contact and the channel of the TFT between the contacts. For a short channel TFT at low drain voltage Id-s4=LiW/Ls C (VG-Vt-s)(Vd-2Vc),
(2)
where Id-s is the short channel drain current, and loo is the infinite length, i.e., intrinsic, mobility of the channel. lito is the same as the measured mobility for a very long channel length TFT because in this case contact effects are negligible. W and Mat. Res. Soc. Symp. Proc. Vol. 297. ©1993 Materials Research Society
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Ls are the channel width and length, C is the gate dielectric capacitance per unit area, VG is the gate voltage, Vt-s is the short channel threshold, and 2 Vc is the sum of the voltage drops between the two contacts
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