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Raghu Murali Editor

Graphene Nanoelectronics From Materials to Circuits Foreword by Jeff Welser

Editor Raghu Murali Nanotechnology Research Center Georgia Institute of Technology Atlanta, GA, USA

ISBN 978-1-4614-0547-4 e-ISBN 978-1-4614-0548-1 DOI 10.1007/978-1-4614-0548-1 Springer New York Dordrecht Heidelberg London Library of Congress Control Number: 2011946064 # Springer Science+Business Media, LLC 2012

All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com)

Foreword

For almost a half century, the semiconductor industry has managed to double the number of transistors on an integrated circuit chip every 18–24 months with such consistency that it has been dubbed Moore’s Law, after Gordon Moore who first noted the trend in 1965. [1] For the past 30 years, the primary technology for the industry has been the silicon complementary metal-oxide-semiconductor (CMOS) field-effect transistor (FET), and it has been the ability to shrink this device according to Robert Dennard’s scaling theory [2] that has largely enabled Moore’s Law to continue for so long. The result has been exponentially increasing performance per dollar in both integrated circuits (ICs) and all of the electronic and information technology (IT) systems they enable. Not only has scaling resulted in growing worldwide semiconductor industry revenues from $20B in 1980 to almost $300B in 2010, but it has also played a major role in driving the overall economy: in the United States, it has been estimated that from 1995 to 2005, while IT industries only made up 3% of Gross Domestic Product (GDP), they accounted for 25% of overall economic growth. Taken as a whole, “these industries contribute more to economy-wide productivity growth than all other industries combined.” [3] However in the early 2000s, as the gate length for the Si FET crossed into the sub-100 nm range and the traditional gate insulator approached 10 nm thicknesses, the industry’s ability to continue to follow Dennard’s rules for decreasing dimensions and supply voltage faltered. Subsequent technology generations have seen exponentially increasing active switching and passive leakage powers, limiting the ability to take full advantage from scaling devices and doubling transistor counts. The result has been an increased focus on n