High-k dielectrics for hybrid floating gate memory applications
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High-k dielectrics for hybrid floating gate memory applications J.G. Lisoni, L. Breuil, P. Blomme, J. Van Houdt IMEC, Kapeldreef 75, 3001 Heverlee (Leuven), Belgium ABSTRACT We report on the materials issues involved in the hybrid floating gate (HFG) device fabrication, where the interpoly dielectric is replaced by an intermetal dielectric (IMD). Indeed, in HFG the dielectric is inserted in between two metal layers in a metal\dielectric\metal stack. The materials of choice were TiN as the metal layer and Al2O3 and HfO2 (and their combination) as IMD. The program/erase performance is discussed based on the dielectric constant and crystallinity of the IMD and the metal-IMD interface characteristics. INTRODUCTION Recently, a new architecture for floating gate (FG) devices that could extend the NAND flash roadmap for sub-20 nm technologies has been proposed [1-2]. In this concept, the standard poly-Si FG is replaced by a poly-Si(n type)\metal stack, so called hybrid FG (HFG). The higher work function of the metal limits the leakage from the floating to the control gate, thus limiting the saturation during programming. The use of metals combined with high permittivity materials in a Si\metal\dielectric\metal\poly-Si stack enables the scaling of the FG beyond 20 nm. The proof of concept has been realized with 50-nm HFG CMOS integrated memory cells using TiN as the metal layers and Al2O3 as the dielectric [3-4]. However, for further scaling one also needs to reduce the equivalent oxide thickness (EOT) of the cell [5]. This can be achieved if a dielectric with larger k (relative dielectric constant) as that of Al2O3 (k~9) is used. HfO2, a material whose k value is at least 15, is a good candidate to replace Al2O3 [6]. Si\HfO2\TiN has been intensively investigated in CMOS logic for high-k\metal gate technologies [4]. However, HFG requires the reverse stack, i.e. Si\TiN\HfO2. Hence, it is important to revisit the thermal stability of the TiN-HfO2 system when exploring it for HFG cells where thermal budgets as high as 1000 °C are used for their fabrication. EXPERIMENT The samples investigated were Si\TiN\dielectric blanket stacks. TiN was 6 nm thick and deposited by sputtering at room temperature. The dielectrics investigated are detailed in Table I. The films were grown by atomic layer deposition using the conditions published in Ref. [7]. The stacks were then submitted to a 1 min N2 annealing (post-deposition anneal, PDA). Our previous experience showed that the optimal PDA condition for Al2O3 is 1000 °C [3]. Therefore, for HfO2-Al2O3 stacks, the 1000 °C PDA step was applied after each Al2O3 deposition (Table I). The samples were characterized by X-ray diffraction (XRD) and X-ray reflectivity (XRR). For the latter, similar models for the dielectric layers as described in Ref. 7 has been used in the present work. Current-voltage (I-V) and capacitance-voltage (C-V) measurements were performed to determine the electrical breakdown (EBD) and dielectric constant of the dielectric films, respectively. For that purpose, we deposite
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