Investigation of Ambipolar Conduction and RF Stability Performance in Novel Germanium Source Dual Halo Dual Dielectric T
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ORIGINAL PAPER
Investigation of Ambipolar Conduction and RF Stability Performance in Novel Germanium Source Dual Halo Dual Dielectric Triple Material Surrounding Gate TFET M. Venkatesh 1
&
G. Lakshmi Priya 2
&
N. B. Balamurugan 3
Received: 24 July 2020 / Accepted: 20 November 2020 # Springer Nature B.V. 2020
Abstract In this study, we present an ambipolar conduction and RF stability performance for a Germanium Source Dual Halo Dual Dielectric Triple Material Surrounding Gate Tunnel FET (Ge(SRC)-DH-DD-TM-SG-TFET). The energy band diagram of the device will be derived using the Stern Stability Factor. The minimum tunneling length is expressed using low-k Silicon dioxide (SiO2) and high-k Hafnium oxide (HfO2) as dual dielectric material. Then the band to band tunneling (BTBT) rate tunneling generation rate will be derived using Kane’s model. In terms of frequency efficiency the proposed device with SiO2/HfO2 as gate dielectric is good enough to attain high cut-off frequency (fT) of 94.22 GHz is observed at drain to source voltage of VDS = 1 V. Efforts have also been made to properly assess the potential of the two halo doped regions regions. An expression for transconductance is proposed and the model is validated using 3-D Silvaco Atlas TCAD device simulator. In addition, to demonstrate the advantage of using Ge(SRC)-DH-DDTM-SG-TFET dual dielectric halo doping in circuit applications, the transient response of the conventional TFET germanium source is compared with the low and high-k dielectric halo doping Ge(SRC) TFET. Keywords Ambipolar current . Analog performance . Radio frequency parameters . Triple material . Cut-off frequency
1 Introduction Tunneling field-effect transistors (TFETs) are one of the major research areas for their low sub-threshold slope (SS), low power consumption and short-channel effects (SCEs) immunity [1–5]. Thus, for massively scaled devices, TFETs can be considered a strong candidate. TFETs’ main drawback,
* M. Venkatesh [email protected] G. Lakshmi Priya [email protected] N. B. Balamurugan [email protected] 1
Department of Electronics and Communication Engineering, M.Kumarasamy College of Engineering, Karur 639113, Tamil Nadu, India
2
School of Electronics Engineering (SENSE), VIT University, Chennai 600127, Tamil Nadu, India
3
Department of Electronics and Communication Engineering, Thiagarajar College of Engineering, Madurai 625015, Tamil Nadu, India
though, is their poor ON-current. Several recommendations were made to build ON current existing in TFETs [6–10]. In addition, p- type TFET, which is an inacceptable ambipolar stream at the channel-drain junction, causes another inconvenience to TFETs for negative or positive gate voltages [11–15]. Many studies have been performed to boost TFET ‘s efficiency in analogue / digital applications by gate and channel engineering technique [16–18]. Meanwhile, a report has been studied [19, 20] on the vulnerability of TFETs to calculate process variation and efficiency. Many reports centred on theoretical or spice
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