Influence of Germanium Source Dual Halo Dual Dielectric Triple Material Surrounding Gate Tunnel FET for Improved Analog/
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ORIGINAL PAPER
Influence of Germanium Source Dual Halo Dual Dielectric Triple Material Surrounding Gate Tunnel FET for Improved Analog/RF Performance M. Venkatesh 1
&
M. Suguna 2 & N. B. Balamurugan 1
Received: 7 November 2019 / Accepted: 9 January 2020 # Springer Nature B.V. 2020
Abstract This paper investigates the RF Stability performance of the Germanium Source Dual Halo Dual Dielectric Triple Material Surrounding Gate Tunnel FET Ge(SRC)-DH-DD-TM-SG-TFET using 3D - Silvaco Atlas TCAD device simulator. The impact of the geometrical parameter, high-k dielectric material and bias conditions on the key figure of merit (FoM) like Transconductance (gm), Gate capacitance (Cgg) and RF parameters like Stern Stability Factor (K), Critical Frequency (fk) are investigated. The analytical model provides the relation between fk and small signal parameters which provide guidelines for optimizing the device geometrical parameter. The results show improvement in ION current, gm, ft and fk for the optimized device structure. The optimized Ge(SRC)-DH-DD-TM-SG-TFET exhibits fk of 75.0 GHz. Keywords Halo doping . Germanium source . RF stability . Surrounding gate TFET . Analog FOMs
1 Introduction For the past three decades, the CMOS devices were driven the semiconductor industry due to the continuous growth of semiconductor processing and technology. Over the years, the CMOS device physical dimensions were reduced to nanometre scale and further scaling is limited by Short Channel Effects (SCE) [1–5]. To overcome such challenges, multi-gate devices are proposed, which show excellent immunity to SCE and yielded better scalable operations [6–9]. Still, these multi-gate devices suffer from DIBL and Threshold Voltage roll-off effects. To overcome the above problems,
* M. Venkatesh [email protected] M. Suguna [email protected] N. B. Balamurugan [email protected] 1
Department of Electronics and Communication Engineering, Thiagarajar College of Engineering, Madurai, Tamil Nadu 625015, India
2
Department of Computer Science and Engineering, Thiagarajar College of Engineering, Madurai, Tamil Nadu 625015, India
recently Tunnel Field Effect Transistor (TFET) is proposed which has gained wider significance because of its low subthreshold slope and small leakage current [10–14]. Moreover, the conventional tunnel FET also suffers from low ON drive current and requires abrupt junctions for tunnelling [15–17]. To overcome the fabrication challenges posed by the MOS and TFET devices, a new transistor called halo doped TFETs which overcomes reverse short channel effects is proposed to achieve better ON and OFF states [18–20]. Even though the halo doping device has better scalable performance than the MOSFETs, still it suffers from the low subthreshold slope. To counter the above challenges, Surrounding gate Tunnel Field Effect Transistor (SG-TFET) is proposed, which exhibits better subthreshold slope of 24 mV/decade and DIBL of 38 mV/Vas compared to conventional TFET [21–25]. Further, most of the research is carried on investigating
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