Investigation on Abrasive Free Copper Chemical Mechanical Planarization for Cu/low k and Cu/ultra low k interconnects
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Investigation on Abrasive Free Copper Chemical Mechanical Planarization for Cu/low k and Cu/ultra low k interconnects S. Balakumar1,*, T. Haque1, 2, R. Kumar1 A.S. Kumar2, and M. Rahman2 1, Institute of Microelectronics, 11, Science Park Road, Science Park II, Singapore 117685, * [email protected] 2 Dept of Mechanical Engineering, National University of Singapore, Singapore Abrasive Free Copper Chemical Mechanical Polishing (AF-CMP) was developed for Cu/low k materials. Blanket film Cu removal rate of 6000 Å/min with very less non-uniformity of 3% achieved for polishing pressure of 1.5 psi. CMP process window and lower critical pressure were identified with pattern wafers. Material removal mechanism was studied using surface morphology of Copper blanket wafers polished using different pressure, rotation rate and slurry flow rate. Material Removal Mechanism (wear mechanism) such as Chemical wear (etching) and mechanical wear (fatigue wear, particle adhesion wear and abrasion wear) have been found. The increase of slurry flow rate and relative velocity and the decrease of pressure give the dominance of chemical wear in material removal mechanism, and vice versa. Dishing control was achieved during Cu polish using different carrier/platen speed for Cu/SiLK™ patterned wafers. The cumulative distribution of the metal line-to-line leakage current measurements of wafers shows good performance and it is comparable to abrasive process. INTRODUCTION A continuing shrinkage in device dimensions beyond manufacturing at 0.13 um requires using both copper (Cu) metallization and low k dielectrics for the interconnect delay. One of the biggest challenges to Cu- dual damascene is Cu Chemical Mechanical Polishing (CMP). Peeling and delamination are two more major challenging issues in Cu/ low materials besides dishing, erosion and scratches. Delamination and peeling are due to materials adhesion and intrinsic mechanical strength, and hardness in addition to high internal stress of metal stacks and shear force during CMP. If we look into stresses owing to fundamental issues associated with processes in Cu/ultra low k materials, accumulation of stresses at every metal level is the one of sources which causes the peeling and delamination in subsequent level. For instance, CMP process developed for first and second metal level may not work for third metal level polishing which cause delamination or peeling due to accumulation of stress. The stress in the film stack might be generated due to various process steps such as etch, clean or CMP processes and also due to pattern design related besides low k materials related properties. The peeling and delamination at various metals is reported already and also given Fig.1 [1]. So, the introduction of more fragile interconnects materials such as ultra low k dielectrics, have amplified the call for the use of low stress CMP process. With diminished hardness, and adhesion, the CMP process has to be “kinder and gentler”: lower down force, lower relative elasticity, velocity, soft pad,
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