Modeling Evolution of Temperature, Stress, Defects, and Dopant Diffusion in Silicon During Spike and Millisecond Anneali

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1070-E06-06

Modeling Evolution of Temperature, Stress, Defects, and Dopant Diffusion in Silicon During Spike and Millisecond Annealing Victor Moroz1, Ignacio Martin-Bragado2, Nikolas Zographos3, Dmitri Matveev3, Christoph Zechner3, and Munkang Choi2 1 TCAD, Synopsys, 700 East Middlefield Road, Mountain View, CA, 94043 2 Synopsys, Mountain View, CA, 94043 3 Synopsys, Zurich, Switzerland ABSTRACT The bulk CMOS devices continue to be the dominant player for the next few technology nodes. This drives the increasingly contradicting requirements for the channel, source/drain extension, and heavily doped source/drain doping profiles. To analyze and optimize the transistors, it has become necessary to simultaneously analyze effects that have been previously decoupled. The temperature gradients, combined with stress engineering techniques such as embedded SiGe and Si:C source/drain and stress memorization techniques, create non-uniform stress distributions which are determined by the layout patterns. The interaction of implantinduced damage with dopants, stress, and defect traps defines the dopant activation, retention of useful stress, and junction leakage. This work reviews recent trends in modeling these effects using continuum and kinetic Monte Carlo methods.

INTRODUCTION Millisecond annealing is being introduced as a performance boost option in addition to the conventional spike anneal, and is expected to replace the spike anneal within the next two technology nodes. This work explores several facets of the spike and millisecond annealing techniques that impose considerable side effects on the process flow, employing physics-based simulation tools which have been calibrated to silicon data. The optical simulations in this work are performed using EMW simulator [1], while the mechanical stress, heat transfer, defect formation, and dopant diffusion are simulated using Sentaurus Process [2]. In addition to the conventional continuum simulation approach, some of the simulations are performed with kinetic Monte Carlo (KMC) approach [3,4].

HEAT ABSORPTION Spike and millisecond annealing techniques exploit electromagnetic waves to heat the silicon wafers. Consider a scanning laser that can be employed for millisecond annealing as well as for the expected future shrinkage of the thermal budget into microsecond and nanosecond timeframe. A bare silicon wafer without any pattern or a wafer with features that are larger than the illumination wavelength will be heated uniformly according to the specific heat absorption coefficients of the materials involved. However, feature sizes that are comparable to or smaller

than the illumination wavelength create diffraction patterns as shown on Fig. 1, indicative of non-uniform heating of the wafer.

Figure 1. Light diffraction patterns in silicon wafer and the polysilicon gates with nitride spacers. Coherent illumination with λ=810nm is assumed. The peak light intensity is shown as red, and the minimum light intensity is shown as blue, corresponding to 0.1 of the peak value.

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