New Slurry Formulation for Copper-CMP Process in a Damascene Integration Scheme
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New Slurry Formulation for Copper-CMP Process in a Damascene Integration Scheme Valentina L. Terzieva1, Bram M. Sijmus1, Marc A. Meuris1, Lothar Puppe2 and Gerd Passing2 1 IMEC, Leuven, Belgium 2 H. C. Starck, Leverkusen Germany ABSTRACT In this work novel slurries both for copper and tantalum nitride removal were developed. In the first step the Cu bulk is removed, by using high selective slurry, which stops on the underlying TaN barrier. The selectivity of Cu vs. TaN achieved with this slurry is larger than 1/100. High selective second step slurry is further introduced for removing the barrier material. In the present work data concerning dishing and erosion will be presented as a function of line width and pattern density across the wafer. Electrical yield measurements on shorts and opens of meander-fork structures will be discussed. INTRODUCTION The silicon IC industry is rapidly moving to adopt copper as the material of choice for circuit interconnects. Because of the lack of etching processes to remove copper, these interconnects must be patterned with a Damascene process, in which copper is deposited over a film with trenches etched in an insulator material [1]. The chemical mechanical polishing step is further introduced to remove the overburden Cu material leaving the wafer surface as flat as possible [2-6]. The planarization task in Cu-CMP is more challenging than in other CMP processes due to larger topography variations and it has to be accomplished twice: while dealing with incoming topography and while polishing heterogeneous surface during barrier removal. Since different materials are polished dishing and erosion are introduced [7-8]. Copper damascene structures can be planarized by two different approaches [9]. In the one step approach copper and barrier material are removed simultaneously with slurry in a single process step. This however requires high removal rate for both copper and barrier and low removal rate for the dielectric or hard mask. Such an approach can lead to higher throughput and less slurry handling but on the other hand it results in more dishing and erosion, which are difficult to be controlled. In the two-step approach two different slurries are used. The copper layer is usually removed in a first step with a very high rate. The slurry used in this step shows high selectivity towards the barrier material and the interlevel dielectric layer (ILD). Since the barrier film polishes at much lower rate it acts as a polish stop for the CMP of copper. Such an effective polish stop allows a longer over polish step, ensuring complete removal of the copper layer. The barrier itself is removed in a second step at a high rate while the removal of the copper and the dielectric is low. This approach allows better control of dishing and erosion. The work presented here focuses on the development and performance of silica based slurries for a two-step Cu planarization process.
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