Non-volatile SRAM memory cells based on ReRAM technology
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Non‑volatile SRAM memory cells based on ReRAM technology Hussein Bazzi1,2 · Adnan Harb3 · Hassen Aziza2 · Mathieu Moreau2 Received: 9 January 2019 / Accepted: 28 July 2020 © Springer Nature Switzerland AG 2020
Abstract Static Random-Access Memories (SRAMs) are very common in today’s chip industry due to their speed and power consumption but are classified as volatile memories. Non-volatile SRAMs (nvSRAMs) combine SRAM features with nonvolatility. This combination has the advantage to retain data after power off or in the case of power failure, enabling energy-efficient and reliable systems under frequent power-off conditions. In this work, several nvSRAMs architectures based on Oxide Random-Access Memory (OxRAM) technology are presented and compared. OxRAMs are non-volatile memories considered as a subset of Resistive RAM (ReRAM) technology. Keywords 1T1R ReRAM · Static Random-Access Memory (SRAM) · Non-volatile Static Random-Access Memory (nvSRAM) · Power consumption
1 Introduction The rapid growth in the field of portable electronic devices has been driven by integrated circuits continuous decrease in power consumption and cost. In this context, emerging memories and specifically Non-Volatile Memories (NVM) based on new materials and technologies have flourished [1]. The promising flow of NVM technology is expected to be the pioneer technology for the upcoming years [2]. In the recent years, the interest shifted from Flash memories to alternative NVM technologies based on new materials. These technologies show signs of future success towards enhancing the memory performance and increasing the capability of scaling [3]. Among the different alternative memory technologies, Resistive RAM based on metal oxides known as Oxide Random-Access Memory (OxRAM) have attracted a lot of attention [4]. Indeed, OxRAM devices feature faster READ/WRITE operations, better energy conservation and high endurance than classical Flash memories [5].
Traditional Static Random-Access Memories (SRAMs) are volatile, which is a major handicap regarding powerdown operation where non-volatile memory is needed. OxRAM can be an integral part of the well-known SRAM. This combination called non-volatile SRAM (nvSRAM) integrates both structures in a single cell [6]. nvSRAM offers a direct bit–bit connection to guarantee a fast switching speed and a high rate of data transfer [7]. This concept allows the structure to achieve genuine data retention and low power consumption with small area. Moreover, the non-volatile capability is integrated on the BackEnd-OfLine (BEOL) [8]. Classical low power techniques including clock gating and power gating are commonly used for MCUs power reduction. Clock gating technique is used for reducing dynamic power by controlling switching activities on the clock path [9]. In the case of power gating, certain areas of the chip are idle and other parts are activated only for certain operations [10]. In this context, emerging Non-Volatile Memory (NVM) devices can act as key enablers in the development of ultra-low po
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