Novel Imprinting Techniques for Fabrication of Multilevel Flexible Electronics

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Novel Imprinting Techniques for Fabrication of Multilevel Flexible Electronics Daniël Turkenburg1, Henk Rendering2, Arjan Hovestad2, Niki Stroeks2, Pascale Maury3, Pieter Moonen4, Jurriaan Huskens4, Ionuţ Barbu1, Erwin Meinders1 1

HOLST Center, High Tech Campus 31, 5656 AE Eindhoven, The Netherlands TNO Science & Industry, De Rondom 1, 5600 HE Eindhoven, The Netherlands 3 ASML, Veldhoven, De Run 5601, 5504 DR Veldhoven, The Netherlands 4 University of Twente, Hallenweg 15, 5722 NB Enschede, The Netherlands 2

ABSTRACT We report a novel method to selectively deposit materials from solution into imprinted micro-capillaries. Dewetting of the solvent just outside the capillaries is balanced to evaporation inside the capillaries. In this way conductive μ-wires can be self-assembled and self-aligned on flexible substrates opening the route to faster and cheaper plastic electronics. INTRODUCTION Flexible electronics offer cost advantages in additional to functional advantages, like conformability, flexibility, rollability and even stretchability. Flexible displays are a key plastic electronic application that soon will hit the market. In this application, distributed transistors are patterned on thin flexible substrates. In particular if plastic substrates are used, the dimensional instability of the plastic substrate needs to be controlled to allow high-resolution patterning of the different structures required for a transistor. In line with the strong and growing demand for cheaper electronics, there is a lot of research efforts that currently go into making lithographic processes compatible with plastic substrates. Polymeric foils are much cheaper and not subject to the scarcity issues related to silicon. The flexible nature of the foils opens the route to roll-to-roll processing allowing a much higher throughput as well as the development of bendable devices. Typically functional devices consist of patterned stacks of semi-conductors, metals and insulators. Proper alignment however of such micro- and nanopatterns relative to each other remains a major challenge, as they are one by one deposited in a stack.

Several technologies have been reported that deal with alignment issues. One way to control the dimensional stability is by lamination of the flexible plastic substrate on a rigid support carrier. In that way, the conventional installed infrastructure can be applied to make for instance the backplane devices for flexible displays1. Compensation is another way, currently being pursued by Holst Centre2. Another approach is based on self-aligned imprint lithography3. In that case, a transistor structure is made by structuring the blueprint of a transistor via imprinting/embossing technology. Alignment is contained in the template and transferred via the embossing step into the substrate on which the transistor is patterned. HP developed a top down method where a stack of resist masks is deposited on an unpatterned stack of materials. A multi-level template is used to structure a resist layer deposited on top of this

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