Performance in Sub-25-nm Range: Circuit Model, Ternary Logic Gates and ADC/DAC
Chapter 8 focuses on the performance of QDGFETs in the sub-nm range. This chapter focuses on the implementation of different ternary logic gates including inverter, NAND, NOR, and XOR. This chapter also discusses the universal property of ternary logic NA
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Novel Three-state Quantum Dot Gate Field Effect Transistor Fabrication, Modeling and Applications
Novel Three-state Quantum Dot Gate Field Effect Transistor
Supriya Karmakar
Novel Three-state Quantum Dot Gate Field Effect Transistor Fabrication, Modeling and Applications
Supriya Karmakar Intel Corporation Hillsboro, Oregon USA
ISBN 978-81-322-1634-6 ISBN 978-81-322-1635-3 (eBook) DOI 10.1007/978-81-322-1635-3 Springer New Delhi Heidelberg New York Dordrecht London © Springer India 2014 This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. Exempted from this legal reservation are brief excerpts in connection with reviews or scholarly analysis or material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work. Duplication of this publication or parts thereof is permitted only under the provisions of the Copyright Law of the Publisher’s location, in its current version, and permission for use must always be obtained from Springer. Permissions for use may be obtained through RightsLink at the Copyright Clearance Center. Violations are liable to prosecution under the respective Copyright Law. The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use. While the advice and information in this book are believed to be true and accurate at the date of publication, neither the authors nor the editors nor the publisher can accept any legal responsibility for any errors or omissions that may be made. The publisher makes no warranty, express or implied, with respect to the material contained herein. Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com)
To my parents Manik Chandra Karmakar and Santwana Karmakar
Preface
This book presents the fabrication and circuit modeling of a quantum dot gate field-effect transistor (QDGFET) and a quantum dot gate NMOS inverter (QDNINV). A conventional metal-oxide-semiconductor field-effect transistor (MOSFET) conducts when the applied gate voltage is more than the threshold voltage of the device. So a MOSFET acts as a switch which cannot conduct below its threshold voltage but conducts beyond its threshold voltage. A QDGFET produces three states in its transfer characteristics: off, on, and a low-current saturation state, known as the intermediate state (“i”), because of the presence of quantum dots in the gate region. A self-consistent
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