Defect Reduction and Its Mechanism of Selective Ge Epitaxy in Trenches on Si(001) Substrates using Aspect Ratio Trapping
- PDF / 1,529,616 Bytes
- 6 Pages / 612 x 792 pts (letter) Page_size
- 56 Downloads / 178 Views
0994-F10-05
Defect Reduction and Its Mechanism of Selective Ge Epitaxy in Trenches on Si(001) Substrates using Aspect Ratio Trapping J.-S. Park1, J. Bai1, M. Curtin1, B. Adekore1, Z. Cheng1, M. Carroll1, M. Dudley2, and A. Lochtefeld1 1 AmberWave Systems Corp., 13 Garabedian Drive, Salem, NH, 03079 2 Dept. of Materials Science & Engineering, Stony Brook Univ., Stony Brook, NY, 11794
ABSTRACT Defect-free germanium has been demonstrated in SiO2 trenches on silicon via aspect ratio trapping, whereby defects arising from lattice mismatch are trapped by laterally confining sidewalls. Results were achieved through a combination of conventional patterning of SiO2, and selective growth of Ge as thin as 450 nm. It was revealed that facets, when formed early on in the growth process, play a dominant role in determining the configurations of threading dislocations in the films. This approach shows great promise for the integration of Ge and/or IIIV materials, sufficiently large for key device applications, onto silicon substrates. INTRODUCTION Ge heteroepitaxy on Si is promising both for high performance Ge p-channel metaloxide-semiconductor (MOS) transistors [1,2] and as a potential path for integrating optoelectronic devices with Si MOS technology [3]. Unfortunately, growing more than a few nanometers of Ge directly on Si leads to a dislocation density of 108 - 109 cm-2 due to the 4.2 % lattice mismatch ó unacceptable for most applications. Solutions such as compositional grading [3,4] or methods utilizing postgrowth high temperature annealing [5,6] have been explored to alleviate this problem. However, for greater ease of integration with Si MOS a defect reduction solution involving minimal epi thickness and minimal thermal budget may be highly desirable. Researchers have shown that these requirements may be met by selective growth of Ge in small vias through a dielectric mask [7,8]. However, this approach has been demonstrated in small area < 200 nm diameter. In this paper we show this technique, which we refer to as aspect ratio trapping (ART), applied to much larger areas. We demonstrate effective trapping of threading dislocations in trenches of arbitrary length. Ge epi-layers as thin as 450 nm were selectively deposited in SiO2 trenches having aspect ratio (AR = trench height / width) > 1. We evaluate the mechanisms which contribute to the reduction in defects, providing evidence that the presence of facets plays a dominant role in directing dislocations towards the outer edges of the trenches. In addition, coalescence of overgrown Ge is investigated. EXPERIMENT These experiments began with 200 mm diameter p-type Si(001) substrates and a 500-nmthick thermal oxide. The oxide layer was patterned into trenches along [110] having 0.2 - 2.5 µm width using a conventional photolithography and reactive ion etching (RIE). It is well known that RIE with CFx chemistries can leave a fluorocarbon residue on the surface causing defective epitaxial layers in subsequent growth [9]. In order to remove this in preparation for epi, an
Data Loading...
