Integrated Vapor Phase Cleaning and Pure no Nitridation for Gate Stack Formation
- PDF / 613,731 Bytes
- 7 Pages / 414.72 x 648 pts Page_size
- 58 Downloads / 188 Views
ABSTRACT The purpose of this publication is to give an insight into process development performed in two modules which belong to a cluster tool designed for the gate stack process sequence of cleaning, gate oxidation, and polysilicon chemical vapor deposition. For the first time, following the hardware and software MESC-based standards, two suppliers have integrated complementary modules to build a cluster tool. This equipment answers the demands of the IC Manufacturers and follows the "best of breed" approach. Four single wafer rapid thermal process chambers, a Vapor Phase Cleaning (VPC) and a Rapid Thermal Oxidation/Nitridation (RTO/N) module from STEAG-AST Elektronik, a polysilicon and a nitride chemical vapor deposition module from ASM International are currently connected together to prove the feasibility of the single wafer processing gate stack cluster tool. INTRODUCTION Scaling in device integration as well as in wafer size result in a growing demand for single wafer production tools. The conversion towards single wafer tools has been realized in almost all process steps throughout FEOL and BEOL. Even thermal processes have started to be transferred to RTP as far as annealing and silicidation are concerned. A major group of thermal processes,
the thermal growth of SiO 2 for gate, tunnel and capacitor applications is dominated by batch furnaces. Intensive research in the recent couple of years has clearly shown that also for this applications RTP will be the technology of choice for the upcoming chip generations in the sub-quarter micron dimensions. Both tools and processes nowadays start their way out of the laboratories into production as it has been proven that process control capability of RTP meets the tight process windows. Besides stand-alone RTP-equipment, clusters including modules for the whole sequence from cleaning through RTO to CVD have been heavily discussed since the early eighties. The advantage of those clusters is clearly to be seen in the better controllability of the interface quality and cleanliness. Exposure of the wafer to ambient air makes interface controllability difficult, whereas integration of different processes into a cluster tool provides the possibility for tight interface control. In a cluster tool the time between subsequent process steps is minimized, repeatable and the ambient is very precisely controlled. The introduction of MESC standards opens an effective way to integrate process modules from different vendors onto standard platforms. The benefit of so called "best of breed" cluster tools for IC-production is evident as the opportunity is given to use the most advanced process equipment for each process and still having one tool for a whole sequence. In the past the MESC based cluster approach suffered from a lack of production performance data but today these data become more and more available as the installed base is in the process of widening. Rapid thermal processing, which is compatible with single wafer processing, facilitates 229
Mat. Res. Soc. Symp. Proc.
Data Loading...
