Tuning of Threshold Voltage in Silicon Nano-Tube FET Using Halo doping and its Impact on Analog/RF Performances
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ORIGINAL PAPER
Tuning of Threshold Voltage in Silicon Nano-Tube FET Using Halo doping and its Impact on Analog/RF Performances Avtar Singh 1
&
Chandan Kumar Pandey 2 & Saurabh Chaudhury 3 & Chandan Kumar Sarkar 4
Received: 27 June 2020 / Revised: 1 September 2020 / Accepted: 7 September 2020 # Springer Nature B.V. 2020
Abstract In this paper, a novel method is proposed for the first time to achieve multiple threshold voltage (VT) for Silicon Nanotube FET. Using TCAD simulator, it is shown that threshold voltage can be varied by tuning the halo doping and tube diameter of Silicon Nanotube FET. The typical method to attain multiple threshold voltages is to select the pertinent gate work-function for individual devices. But this is not practically feasible due to the difficult process complexity. In this work, the tuning of halo doping and nanotube diameter can be elected to provide three possible values of VT at 14-nm technology node. Furthermore, short-channel effect like Drain Induced Barrier Lowering (DIBL) is also found to be reduced with HALO doped region at source side. It is also observed that the threshold voltage decreases while increasing the tube diameter. Moreover, HALO doping at drain side is found showing a significant improvement in analog/RF performances of the device which eventually makes the device more suitable for radio-frequency integrated circuit applications. Keywords Analog/RF performances . DIBL . Si-NTFET . HALO Doping . Multi Vt . Tubular FET
1 Introduction To diminish the short channel effects (SCEs) faced by current CMOS technology, a large number of methods have already been suggested by various group of researchers [1]. Among all these methods, techniques based on gate engineering have been found showing reduced SCEs in MOSFETs. Some of these gate engineering techniques are such as gate stacks configuration, multi gate structures and replacing the dielectric material with other materials [2, 3]. Apart from these aforementioned techniques, many more innovative structures have been proposed and implemented by researchers which can be used to replace the traditional MOSFET devices. Even
* Avtar Singh [email protected] 1
Department of Electronics and Communication Engineering, Adama Science and Technology University, Adama, Ethiopia
2
School of Electronics Engineering, VIT-AP University, Amravati, Andhra Pradesh, India
3
Department of Electrical Engineering NIT, Silchar, India
4
Electronics and Telecommunication Engineering Department, Jadavpur University, Kolkata, India
though, most of those devices are found to cause a reasonable reduction in short-channel effects (SCEs) but at the cost of fabrication complexity [4]. On reducing the channel length, the control of the gate over the channel weakens because of increase in the charge sharing from drain/source [4–7]. To attain the low leakage and good performance of the shortdimension devices, the world wide researchers found the3D device structures like Horizontal and vertical Double Gate, FINFET, and GAA structures to be mor
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