Performance Tuning and Reliability Analysis of the Electrostatically Configured Nanotube Tunnel FET with Impact of Inter
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ORIGINAL PAPER
Performance Tuning and Reliability Analysis of the Electrostatically Configured Nanotube Tunnel FET with Impact of Interface Trap Charges Ashok Kumar Gupta 1 & Ashish Raman 1 & Naveen Kumar 1 Received: 6 September 2020 / Accepted: 12 October 2020 # Springer Nature B.V. 2020
Abstract This paper examines, an electrostatically configured Nano-Tube Tunnel Field-Effect Transistor (ED-NTTFET). During the fabrication process, different charges such as fixed charge, oxide trapped charge, and interface trapped charge have been produced at the gate oxide interface. So the effect of positive and negative interface trapped charge (+ITC & -ITC) has been proposed for the first time for electrostatic doped-based Nano-Tube TFET (ED-NTTFET). There are two types of techniques, charge plasma (EP) based technique and electrostatic doped (ED) technique is used to produce the induced charge in the intrinsic channel region. In the charged plasma (CP) technique, the metal work-function is used to produce the induced charge while in the electrostatic doped (ED) technique electrostatic voltage is applied across the source and drain side to produce the induced charge in the intrinsic channel region. Analysis of the various device parameters such as hole/electron concentration, energy diagram, electric field, tunneling rate, driving current, OFF current, ON current, ION/IOFF, threshold voltage, and average sub-threshold slope in the presence of interface trapped charge (ITC). Due to positive interface trapped charge electric field and band to band tunneling rates are improved. So the drain current of the device also improved from the 2.94*10−5 A/um2 to 5.35*10−5A/um2. Linearity parameters such as second & third order trans-conductance (gm2 & gm3), second & third order voltage intercept point (VIP2 & VIP3), second & third order harmonics distortions (HD2 & HD3) and intermodulation distortions (IMD) have been discussed. The negative interface trapped charge (-ITC) degrades the linearity parameter of the device and the positive interface trapped charge (+ITC) improves the linearity parameter of the device. The proposed electrostatic doped nano-tube TFET (EDNTTFET) produced higher cut-off frequency at lowers operating gate voltage. Keywords Charge plasma technique (CP) . Electrostatic doped technique (ED) . Nano-tube TFET (NT-TFET) . Linearity parameter . Tunnel field-effect transistors (TFETs) . Interface trapped charges (ITCs)
1 Introduction As the transistors are shrinking below the deep sub-nanometer region [1–3], the continued scaling down of transistor faces
* Ashok Kumar Gupta [email protected] Ashish Raman [email protected] Naveen Kumar [email protected] 1
VLSI design Laboratory, Department of Electronics and communications, Dr. B. R. Ambedkar National Institute of Technology, Jalandhar 144011, India
the shorts channel effects (SCEs) [4–6], power dissipation, and random dopant fluctuations (RDFs) problems [7–8]. To reduce these problems different novel devices are developed such as gate all around Nanowire (NW)
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