Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications
Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications by: Niccolo΄ Battezzati Luca Sterpone Massimo Violante This book describes the challenges faced by designers when implementing a mission- or safety-critical application using
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Niccolò Battezzati · Luca Sterpone · Massimo Violante
Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications
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Niccolò Battezzati Dipto. Automatica e Informatica Politecnico di Torino Corso Duca degli Abruzzi 24 10129 Torino, Italy [email protected]
Luca Sterpone Politecnico di Torino Corso Duca Degli Abruzzi 24 10129 Torino, Italy [email protected]
Massimo Violante Dipto. Automatica e Informatica Politecnico di Torino Corso Duca degli Abruzzi 24 10129 Torino, Italy [email protected]
ISBN 978-1-4419-7594-2 e-ISBN 978-1-4419-7595-9 DOI 10.1007/978-1-4419-7595-9 Springer New York Dordrecht Heidelberg London Library of Congress Control Number: 2010938708 c Springer Science+Business Media, LLC 2011 All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com)
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1 4
Part I Basic Concepts 2 Reconfigurable Field Programmable Gate Arrays: Basic Concepts . . . 2.1 FPGA Architectures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 FPGA Configuration Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.1 Floating Gate Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.2 Antifuse Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.3 SRAM Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 The Logic Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.1 Fine-Grain Logic Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.2 Coarse-Grain Logic Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4 The Routing Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4.1 The Switching Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 The Input/Output Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6 The Configuration Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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