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RELAXED SILICON-GERMANIUM ON INSULATOR (SGOI) Zhiyuan Cheng, Matthew T. Currie, Chris W. Leitz, Gianni Taraschi, Minjoo L. Lee, Arthur Pitera, Judy L. Hoyt*, Dimitri. A. Antoniadis*, Eugene A. Fitzgerald Massachusetts Institute of Technology Department of Materials Science and Engineering *Department of Electrical Engineering and Computer Science 77 Massachusetts Ave. Cambridge, MA 02139 (E-mail: [email protected]) ABSTRACT We have fabricated high quality SGOI substrates and demonstrated high mobility enhancement in strained-Si MOSFET’s fabricated on the relaxed SGOI substrates with a Ge content of 25%. The substrates were fabricated by wafer bonding. The initial relaxed Si1-xGex layers were grown on Si donor substrates by a graded epitaxial growth technology using ultrahigh vacuum chemical vapor deposition (UHVCVD). The SiGe wafers were then bonded to oxidized silicon handle wafers. Two different approaches have been developed to fabricate SGOI substrates: an etch-back process utilizing a 20% Ge layer as a natural etch stop, and a hydrogen-induced wafer delamination process using H+ implantion. The resultant SiGe film quality was compared among the different approaches. Large-area strained-Si MOSFET’s were then fabricated on the SGOI substrates. Epitaxial regrowth was used to produce the upper portion of the relaxed SiGe and the surface strained Si layer. The measured electron mobility shows significant enhancement over both the universal mobility and that of co-processed bulk-Si MOSFET’s. This SGOI process has a low thermal budget and thus is compatible with a wide range of Ge contents in Si1-xGex layer. I. INTRODUCTION Relaxed Si1-xGex-on-insulator (SGOI) is a very promising technology as it combines the benefits of two advanced technologies: Silicon-on-Insulator (SOI) and SiGe technology. SiGebased devices have shown advantageous dc and rf performance using the enhanced electronic properties associated with strain engineering and heterojunction energy barriers. For example, it has been shown that enhanced carrier transport makes strained Si on relaxed SiGe a promising candidate for improving the performance of CMOS technology [1]. The SOI configuration offers various advantages associated with the insulating substrate, namely reduced parasitic capacitances, improved isolation, etc. High mobility strained-Si or strained-Si1-xGex MOS devices can be made on SGOI substrates. Other III-V optoelectronic devices can also be integrated into the SGOI substrate by matching the lattice constants of III-V materials and the relaxed Si1-xGex. Several research groups have reported work on a relaxed Si1-xGex-on-insulator structures [28]. Much of this work has concentrated on SGOI substrates fabricated using the separation by implantation of oxygen (SIMOX) technology [2-4]. In that process, a high dose oxygen implant is used to bury high concentrations of oxygen in a Si1-xGex layer, which is then converted into a buried oxide (BOX) layer upon annealing at high temperature (for example, at 1350 ºC for 6 hours). However, Ge segreg