Tetherless, 3D, Micro-Nanoscale Tools and Devices for Lab on a Chip Applications
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Tetherless, 3D, Micro-Nanoscale Tools and Devices for Lab on a Chip Applications David H. Gracias 1,2 1 Department of Chemical and Biomolecular Engineering and 1Department of Chemistry, Johns Hopkins University, 3400 N Charles StreetBaltimore, MD 21218, USA. ABSTRACT On the macroscale, a laboratory scientist uses a large number of tools such as flasks, crucibles, spatulas, filter funnels, test tube holders and grippers. If laboratory procedures are to be miniaturized within chips, micro and nanoscale analogs of these macroscopic tools could provide enhanced functionality. In this paper, I describe research efforts in our group aimed at engineering three dimensional, tetherless and lithographically patterned miniaturized structures for lab on a chip applications. INTRODUCTION There are numerous tetherless structures such as liquid droplets, magnetic and polymeric beads and molecular containers that have been widely utilized in lab on a chip systems to enable chemistry and chemical delivery with spatio-temporal control [1-2]. Mobile 3D encapsulation devices can be used to deliver chemicals, on-demand, to specific locations within the chip. Miniaturized grasping tools can be used to deliver, capture, and retrieve objects to-and-from hard to reach places within fluidic channels. As laboratory scale procedures are miniaturized, in addition to planar and quasi planar fluidic devices, there is a need to develop miniaturized analogs of macroscopic laboratory tools and devices. Over the last five years, our research group has utilized lithographic fabrication and self-assembly to fabricate these tools and related devices for lab on a chip applications. RESULTS and DISCUSSION There are several unique features of the devices we have constructed. Lithographic Patterning Our tools and devices have been patterned using photolithography and electron-beam lithography. Conventional lithographic patterning can enable highly precise patterning and monodisperse structuring of devices in a parallel and cost effective manner. Additionally, lithographic processes are compatible with the integration of electronic, optical and communication devices. Hence, by utilizing lithographic patterning, it may be possible to integrate these components onto mobile lab on a chip devices. Self-assembly to enable three dimensionality
A severe limitation of many lithographic processes is that they are inherently two dimensional. Hence, we utilize self-assembly to structure lithographic components and integrate devices in 3D. The need for three dimensional patterning in miniaturized lab on a chip devices is evident from Fig. 1. Typically, while it is relatively straightforward to pattern devices along certain axes, it is far more challenging to pattern them along orthogonal axes. In the case of an encapsulant or microwell; limited patterning allows the encapsulated objects to interact with their surroundings only along one axis. In contrast, 3D patterning enables them to interact in all three dimensions. This interaction is important when t
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