The Performance of the Gate Electrode Using Co Thin Films Selectively Deposited on SAMs Patterns for a-Si TFT
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The Performance of the Gate Electrode using Co Thin Films Selectively Deposited on SAMs Patterns for a-Si TFT H.J. Yang, and J.G. Lee School of Advanced Materials Engineering, Kookmin University, Seoul 136-702, Korea B. S. Cho, J. H. Lee, C. O. Jeong, K. H. Chung Active Matrix Liquid Crystal Display Division, R&D Team, Samsung Electronics Co., LTD., Yongin 449-711, Korea ABSTRACT Selective deposition of Co thin films has been developed to produce Co pattern for TFT gate electrode on glass. We have been carried out by the selective growth of Co films with combination of micro-contact printing and metal organic chemical vapor deposition (MOCVD) at low temperature below 100oC. In the first step octadecyltrichlorosilane(OTS) layer with polydimethylsiloxane(PDMS) stamps was pre-patterned on glass. The patterned OTS area created a hydrophobic surface on glass which can prohibit nucleation and growth of Co films. In the second step a MOCVD Co selective deposition examined the difference of incubation time between OTS coated glass and pure glass. We optimized Co selective deposition through working pressure, deposition temperature, and gas flow rate ratio. Root mean square (rms) of Co films deposited on glass is 2nm enough to use gate electrode. OTS pattern was decomposed by UV treatment in the range of 280 and 350nm and then trilayer(n+Si/a-Si/SiNx) was continuously created on the sample which was selectively organized Co gate electrode on glass. We fabricated thin film transistor (TFT) of inverse staggered type using selectively deposited Co gate pattern. Reflectance was used to evaluate incubation time for Co deposition time and AFM was employed to confirm selectivity of Co thin film. The subthreshold slope and on/off current ratio was 0.88 V/decade and 6x106, respectively. The electron field-effect mobility at saturation was 0.35 cm2/Vs for Vd = 9V. INTRODUCTION Recently, the new patterning method to simplify TFT fabrication step have been examined by using selective deposition. This new method can reduce process step for fabricating a-Si TFT through micro-contact printing (µCP) coupled with MOCVD Co.[1-5] Our study adopted micro-contact printing to pattern octadecyltrichlrosilane(OTS) on glass: these surfaces can control the nucleation and subsequent growth of cobalt on the uncovered glass surface.[6-8] The self-assembling of OTS
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on glass or oxide layer is the enabling technology in the bottom-up approach to maskless process. This OTS patterning with PDMS provides a simple process to patterning metallization by CVD and facilitating the formation of metal multilayers by the combination of selective metal depositions. Also, in this simple process, the deposition conditions of Co films with excellent selectivity are important to form gate electrode for a-Si TFT. Additional issue that encountered in CVD Co process is the surface roughness of CVD Co films, since CVD Co shows the much rough surface morphology compared with that of PVD Co. The surface roughness of Co gate electrode can be a critical factor
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