Three Dimensional Integrated Circuit Design EDA, Design and Microarc
This book presents an overview of the field of 3D IC design, with an emphasis on electronic design automation (EDA) tools and algorithms that can enable the adoption of 3D ICs, and the architectural implementation and potential for future 3D system design
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Yuan Xie Jason Cong Sachin Sapatnekar Editors
Three-Dimensional Integrated Circuit Design EDA, Design and Microarchitectures
123
Integrated Circuits and Systems
Series Editor Anantha Chandrakasan, Massachusetts Institute of Technology Cambridge, Massachusetts
For other titles published in this series, go to http://www.springer.com/series/7236
Yuan Xie · Jason Cong · Sachin Sapatnekar Editors
Three-Dimensional Integrated Circuit Design EDA, Design and Microarchitectures
123
Editors Yuan Xie Department of Computer Science and Engineering Pennsylvania State University [email protected]
Jason Cong Department of Computer Science University of California, Los Angeles [email protected]
Sachin Sapatnekar Department of Electrical and Computer Engineering University of Minnesota [email protected]
ISBN 978-1-4419-0783-7 e-ISBN 978-1-4419-0784-4 DOI 10.1007/978-1-4419-0784-4 Springer New York Dordrecht Heidelberg London Library of Congress Control Number: 2009939282 © Springer Science+Business Media, LLC 2010 All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com)
Foreword
We live in a time of great change. In the electronics world, the last several decades have seen unprecedented growth and advancement, described by Moore’s law. This observation stated that transistor density in integrated circuits doubles every 1.5–2 years. This came with the simultaneous improvement of individual device performance as well as the reduction of device power such that the total power of the resulting ICs remained under control. No trend remains constant forever, and this is unfortunately the case with Moore’s law. The trouble began a number of years ago when CMOS devices were no longer able to proceed along the classical scaling trends. Key device parameters such as gate oxide thickness were simply no longer able to scale. As a result, device offstate currents began to creep up at an alarming rate. These continuing problems with classical scaling have led to a leveling off of IC clock speeds to the range of several GHz. Of course, chips can be clocked higher but the thermal issues become unmanageable. This has led to the recent trend toward microprocessors with multiple cores, each running at a few GHz at the most. The goal is to continue improving performance via paralle
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