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Dramatic scaling down from flip-chip joints to microbumps With two-dimensional large-scale integrated circuits (ICs) approaching the limit of Moore’s Law, the most promising solution is three-dimensional (3D) ICs based on chip stacking.1–3 The critical architectural element in 3D ICs is the vertical interconnect developed using through-Si via (TSV) and Cu microbump techniques. Thousands of microbumps are typically present on a given TSV chip. Pb-free solder has been employed for the microbumps to join two chips vertically. Overall, the solder joint is a very mature form of technology widely used in flip-chip technology,4 in which solder bumps are fabricated on Si dies, and then the Si dies are flipped over to join with polymer substrates to form vertical interconnects. Figure 1a presents a cross-sectional scanning electron microscope image of a typical flip-chip joint with Sn2.5Ag solder.5 The joint is 100 μm in diameter, and the solder is approximately 70 μm in height. As labeled in the figure, the under-bump metallization (UBM) on the chip side is 5 μm Cu/3 μm Ni. On the substrate side, the metallization is 5 μm electroless Ni on Cu traces. The solder has reacted with the metallization on the chip and substrate sides to form Ni3Sn4 intermetallic compounds of 1.0 μm thickness,

such that the joint can provide electrical and thermal conduction, as well as mechanical strength to hold the chip and the substrate. The solder volume is estimated to be 6 × 105 μm3, which is much larger than that of the UBM. As the microelectronic industry shifts to 3D ICs, more inputs/outputs are needed. Therefore, microbumps of 20-μm diameter are currently being adopted to be the vertical interconnects between chips. The microbumps have been successfully fabricated by reflow or thermo-compression.6–14 Typically, reflow is carried out in an oven at a temperature above the melting point of the solder for approximately one minute, whereas thermo-compression is achieved by a bonder with a compressive force above the melting point for a few seconds. Figure 1b shows the structure of a typical Sn2.5Ag microbump with 5 μm Cu/3 μm Ni UBM on both top and bottom chips. The solder height decreases to only 6.2 μm. Nevertheless, the thickness of the UBM cannot be scaled down accordingly due to consideration of metallurgical reactions. If the UBM is too thin, intermetallics (IMCs) would detach from the UBM when the UBM is consumed.15 Therefore, the UBM thickness of the microbump remains approximately the same as that of the flip-chip joint. It is noteworthy that the transistor has gradually scaled down in the past three decades. For example, the minimum feature length shrank from 90 nm to 65 nm nodes

Chih Chen, Department of Materials Science and Engineering, National Chiao Tung University, Taiwan; [email protected] Doug Yu, Taiwan Semiconductor Manufacturing Company, Taiwan; [email protected] Kuan-Neng Chen, Department of Electronics Engineering, National Chiao Tung University, Taiwan; [email protected] DOI: 10.1557/mrs.2015.29

© 2015 Materials Rese