A Fully Self-Aligned Amorphous Silicon Tft Technology for Large Area Image Sensors and Active-Matrix Displays
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ABSTRACT We have developed a fully self-aligned amorphous silicon TFT technology, which is suitable for large area image sensors and active matrix displays. Self-alignment is achieved by defining the top nitride by back exposure and then forming source and drain contacts by ionimplantation and silicidation. We incorporate a low resistance gate metallisation process, by using Al metal, capped by Cr. We have compared the process of forming the silicide after the ion-implantation step, with a new process of forming the silicide first and then implanting through the formed silicide. We find a significant advantage to the latter method, where we can achieve a higher doping level and reduced contact resistance. We have therefore optimised our process based on this method. Transistor characteristics as a function of channel length for both methods show the improved contact resistance, obtained with the latter method. We obtain field effect mobilities of 0.7cm 2V's-', measured in the saturated region, for a channel length of 8gm. INTRODUCTION Amorphous silicon thin film transistors are used as switching elements in high information density active-matrix displays [1] and large area image sensors [2]. Standard amorphous silicon TFT technology uses transistor structures with a back channel etch process [3] (called type A process in [1]), or an etch-stop process [4] (called type B process in [1]), or by a top gate TFT process [5]. In all of these TFTs, the source and drain electrodes are defined using a photolithography mask, which is optically aligned to the gate electrode mask. The resulting TFT has a considerable overlap of the source and drain electrode with the gate electrode, resulting in significant parasitic capacitance. A semi-self aligned version of the etch-stop TFT [6] reduces the parasitic capacitance slightly, but there is still a need for a fully self-aligned TFT in the more demanding applications. A fully self-aligned TFT was proposed by the NEC group [7] and also investigated by the Toshiba group [8]. This used an ion-implantation step followed by a silicidation step to form a source-drain contact in perfect alignment with the gate electrode in a modified etch-stop process. A fully self-aligned TFT, made by laser crystallisation of the source and drain contacts has also been reported in an etch-stop structure [9] and a top gate structure [10]. In this paper, we further develop the fully self-aligned etch stop TFT made by ionimplantation and silicidation. In particular, we investigate the alternative process of forming the silicide before the ion-implantation, so that the ion implantation is made through the formed silicide. We find that this new process gives better results and have optimised our process based on this method. In order to fully exploit the advantages of the fully self-aligned TFT, it is also necessary to introduce a low resistance gate metallisation scheme, so that the gate delay time given by the RC time constant is as low as possible. We have therefore developed a process using Al capped by C
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