Design of an Area Efficient and Low Power MAC Unit
A design of an area efficient and low power 16 bit Multiply and Accumulate (MAC) unit is implemented in this paper. MAC unit performs various Digital Signal Processing applications generally contain number of repetitive methods having multiplications and
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Department of Electronics and Communication Engineering, Gyan Ganga Institute of Technology and Sciences, Jabalpur, India [email protected], [email protected] Department of Information and Communication Technology, ABV-Indian Institute of Information Technology and Management, Gwalior, India [email protected]
Abstract. A design of an area efficient and low power 16 bit Multiply and Accumulate (MAC) unit is implemented in this paper. MAC unit performs various Digital Signal Processing applications generally contain number of repetitive methods having multiplications and additions. The MAC unit is designed by Modified Wallace Multiplier (MWM) using compressor with Carry Increment Adder and Carry Select Adder as final adder separately. The proposed design is implemented in Verilog Hardware Description Language (HDL) using Xilinx 14.5 Virtex7 and synthesis is done in Synopsys Design Compiler using Designware logic standard cell area library of 90 nm and 45 nm technology. Keywords: Modified Wallace Multiplier Compressor Adder Carry Select Adder Multiply and accumulator
Carry Increment
1 Introduction In the modern world, devices are made use of RISC processor and Digital Signal Processing (DSP). In DSP, one of the most intricate operation is the multiply accumulate operation [1, 2]. For high performance MAC unit is the basic element in applications like in convolution, inner products, and filters. DSP uses non linear functions such as Discrete Cosine Transform (DCT) and Discrete Wavelet Transform (DWT). As MAC unit runs independent of the CPU, can process data separately. The basic concern of MAC design is to achieve increase in its speed. As speed and output rate are always the main concerns of DSP systems [3, 4]. MAC unit performs many DSP applications involving multiplications and/or additions. The rate of the processor mainly depends on the speed of the MAC unit hence complexity of MAC unit design and power consumption is the major concern for real time processing applications. MAC operation is the basic operation used in digital design of DSP applications, multimedia processing, image processing and other applications which require repetitive multiplications and additions such as Fast Fourier Transform (FFT), Finite Impulse Response (FIR). To improve the speed, MAC unit depends on the two main sub-units. The first is the multiplication process and the other one is to accumulate. © Springer Nature Singapore Pte Ltd. 2016 A. Unal et al. (Eds.): SmartCom 2016, CCIS 628, pp. 276–284, 2016. DOI: 10.1007/978-981-10-3433-6_33
Design of an Area Efficient and Low Power MAC Unit
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The basic function of proposed 16 bit MAC unit is to multiply the multiplier and multiplicand and add the required product with the result stored in an accumulator. The paper is alienated into six sections. In the first section discuss about the introduction of the MAC unit. Second section describes the basic function of MAC unit. Section third deals with the operations of MWM without using 4:2 compressor, MWM using 4:2
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