Nanopackaging Nanotechnologies and Electronics Packaging
Nanopackaging: Nanotechnologies and Electronics Packaging presents a comprehensive overview of nanoscale electronics and systems packaging, and covers nanoscale structures, nanoelectronics packaging, nanowire applications in packaging, and offers a roadma
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James E. Morris Editor
Nanopackaging Nanotechnologies and Electronics Packaging
Editor James E. Morris Portland State University Department of Electrical and Computer Engineering 1900 SW 4th Avenue Portland, OR 97201 USA
ISBN 978-0-387-47325-3
e-ISBN 978-0-387-47326-0
Library of Congress Control Number: 2008923105 © 2008 Springer Science+Business Media, LLC All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now know or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. Printed on acid-free paper 9 8 7 6 5 4 3 2 1 springer.com
Foreword
Semiconductors entered the nanotechnology era when they went below the 100 nm technology node a few years ago. Today the industry is shipping 65 nm technology wafers in high volume, 45 nm is in production, with 32 nm working at the development stage. While the predictions that Moore’s Law has reached it practical limits have been heard for years, they have proven to be premature. And it is expected that the technology will continue to move forward unabated for some years before it comes close to the basic physical limits to CMOS scaling. Consumers are becoming the dominant force for electronic products. The industry has learnt that the consumer market is driven by many factors other than CMOS scaling alone. Functional diversification, accomplished through integration of multiple circuit types, and different device types, such as MEMs, optoelectronics, chemical and biological sensors and others, provides electronic product designers with different functional capabilities meeting the needs, wants, and tastes of consumers. This functional diversification together with cost, weight, size, fashion and appearance, and time to market, are critical differentiators in the market place. These two technology directions are often described as “More Moore” and “More than Moore”. Packaging is the final manufacturing process transforming semiconductor devices into functional products for the end user. Packaging provides electrical connections for signal transmission, power input, and voltage control. It also provides for thermal dissipation and the physical protection required for reliability. Packaging governs the size, weight, and shape of the end product and is the enabler for functional diversification through package architecture and package design. In the new landscape of advancing device technology nodes, and a dynamic consumer market place, packaging can become either the enabling
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