Nano-scale Characterization of Surface Defects on CMP-finished Si Wafers by Scanning Probe Microscopy Combined with Lase
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0991-C08-02
Nano-scale Characterization of Surface Defects on CMP-finished Si Wafers by Scanning Probe Microscopy Combined with Laser Light Scattering Kenta Arima, Takushi Shigetoshi, Haruyuki Inoue, Tsukasa Kawashima, Takaaki Hirokane, Toshihiko Kataoka, and Mizuho Morita Department of Precision Science and Technology, Osaka University, 2-1, Yamada-oka, Suita, Osaka, 565-0871, Japan
ABSTRACT We utilize scanning probe microscopy combined with laser light scattering to detect nano-scale surface defects called microscratches on CMP-finished Si wafers. We find that most microscratches detected by the combined method are very shallow trenches with widths and depths of 80-200 nm and 0.1-0.2 nm, respectively. The dependence of scattered-light intensity on the size of microscratches agrees with theoretical calculations within one order of magnitude.
INTRODUCTION Chemical mechanical polishing (CMP) has long been used for the production of Si wafers. In addition, CMP is now applied to the planarization of Cu and interlayer dielectrics such as SiO2 for the realization of multilevel interconnections and shallow trench isolations [1]. CMP plays a key role in the fabrication of ultra-large scale integrated (ULSI) devices. With device scaling, allowable surface defects on a CMP-finished surface are becoming smaller to levels that do not affect device performance and reliability. Recently, a surface defect, called microscratches, that is formed during CMP processes has been attracting increasing attention. Homma et al. have reported that the preferential deposition of Cu or Fe takes place in diluted HF solutions at both pitlike defects and microscratches with nanometer-scale depths that are intentionally formed on Si surfaces by diamond probe and diamond slurry [2]. In the fabrication process of ULSI devices, the attempted removal of metallic contaminations on Si surfaces is carried out by wet-chemical treatments before the formation of gate insulators, because metallic contaminations on a Si substrate degrade the performance of metal-insulator-semiconductor (MOS) devices [3]. However, the previous study mentioned above indicates that metallic contaminations desorbed from Si surfaces can readsorb at microscratches in chemical solutions. These examples clearly demonstrate that the control of microscratches on polished surfaces is one of the most important issues for CMP processes [2-5]. And it is necessary to measure the profile and density of microscratches on polished Si wafers accurately. Scanning probe microscopy is widely used to evaluate surface microroughness of CMP-finished semiconductor surfaces. Figure 1 shows a typical scanning tunneling microscopy (STM) image of CMP-finished Si(001) wafers followed by dilute HF dipping [6,7]. Figure 1 demonstrates that scanning probe microscopy techniques are powerful tools for measuring three-dimensional structures on CMP-finished surfaces on the nanometer, or even atomic scales. However, the areas evaluated by scanning probe microscopy such as STM and atomic force microscopy (AFM)
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