Stressmigration studies on dual damascene Cu/oxide and Cu/low k interconnects
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Stressmigration studies on dual damascene Cu/oxide and Cu/low k interconnects Won-Chong Baek1, Paul. S. Ho1, Jeong Gun Lee2, Sung Bo Hwang2, Kyeong-Keun Choi2, and Jong Sun Maeng2 1 Microelectronics Research Center, the University of Texas at Austin, Austin, TX 78712, USA, 2 System IC R&D Center, Hynix Semiconductor Inc., 1 Hyangjeong-dong, Hungduk-gu, Cheongju Si, 361-725, South Korea ABSTRACT Stress-induced void formation (SIV) was studied in dual damascene Cu/oxide and Cu/low k interconnects over a temperature range of 140 ~ 350 °C. Two modes of stressmigration were observed depending on the baking temperature and sample geometry. At lower temperatures (T < 290 °C), voids were formed under the periphery of via connecting to narrow lines. This mode of stressmigration showed a typical behavior of stressmigration with peak damage at 240 °C, and an activation energy (Q) of 0.75 eV for Cu/oxide interconnects. At a higher temperature range (T > 290 °C), voids were found in via bottoms which were connected to wide lines. The rate of high temperature stressmigration increased exponentially with temperature up to 350 °C and did not show a peak at a certain temperature. The activation energy was 1.0 eV for Cu/oxide, 0.86 eV for Cu/OSG, and ~1.0 eV for Cu/FSG interconnects. The dependence of stressmigration on linewidth, sample geometry, and ILD material is presented in this paper. INTRODUCTION Stressmigration has been a major concern on interconnect reliability.
In Al(Cu) interconnects,
void formation was known to be driven by a high tensile stress state in narrow lines [1]. Since the driving force, i.e. tensile stress, decreases with increasing temperature while the diffusivity increases with increasing temperature, there is a peak rate of stressmigration at a certain temperature (180 ~ 250 °C). However, in Cu interconnects, it was reported that stressmigration was more significant in wide lines than in narrow lines and it was attributed to vacancy sources due to grain growth [2]. There are several explanations regarding stressmigration in via-towide line structures according to their process technologies [3]. In this paper, the stressmigration phenomenon in dual damascene Cu/oxide and Cu/low k interconnect was studied by using high sensitivity in-situ resistance measurement technique to investigate its dependence on linewidth, sample geometry, and ILD material in a temperature range of 140 ~ 350 °C. Void formation was verified by FIB micrograph and appropriate kinetics are presented in this paper.
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EXPERIMENTAL DETAILS Stressmigration tests were done using dual damascene Cu/oxide and Cu/low k via-chain structures with via size of 0.16, 0.19, 0.36 µm. To investigate the linewidth dependence, narrow-line and wide-line structures were tested in the same runs (Figure 1). In narrow-line structures, the linewidth was comparable to the via size e.g. 0.36 µm via and 0.44 µm line, respectively. In wide-line structures, linewidth was up to 2.0 µm. The rate of stressmigration was obtained by in-situ resistance me
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