The Use of SiGe Barriers During the Formation of p + Shallow Junctions by Ion Implantation
- PDF / 100,175 Bytes
- 6 Pages / 612 x 792 pts (letter) Page_size
- 98 Downloads / 246 Views
C4.11.1
The Use of SiGe Barriers During the Formation of p+ Shallow Junctions by Ion Implantation Phillip E. Thompson1, Joe Bennett2, and Susan Felch3 1 Code 6812, Naval Research Laboratory, Washington, DC 20375, USA 2 International SEMATECH, Austin TX 78741, USA 3 Applied Materials, Sunnyvale, CA 94086, USA ABSTRACT Ultra-shallow p+ junctions are required for next generation electronics. We present a technique for the formation of ultra-shallow p+ junctions that increases the thermal stability of the junctions formed by ion implantation. By using a 10 nm Si1-xGex barrier layer, the diffusion of B is inhibited during high temperature processes. Alloys having a composition from x = 0 to 0.4 were investigated and it is shown that the most effective barrier had the maximum Ge fraction. The junction depth decreased to 36.7 nm for a 5x1015 /cm2 1kV BF3 plasma implant spike annealed at 1050 oC, compared to a junction depth of 48 nm for a Si control sample having the identical implant and anneal. It is hypothesized that the inhibition of B diffusion in the alloy layer is caused by a reduction of the Si self-interstitials in the alloy. INTRODUCTION Within the evolution of electronics there is a concentrated effort to develop techniques to form ultra-shallow p+ doping layers. For example, physical gate lengths less than 35 nm are predicted for deep sub-micron complementary metal-oxide-semiconductor (CMOS) field effect transistors [1] and the ideal values for the junction depth of the source/drain extension regions are only about 1/2 of the gate length [1]. Ion implantation is the standard production technique for the formation of p+ contact layers. Techniques are currently being developed for very low energy implantation and rapid thermal anneal (RTA) for activation. Unfortunately these procedures may not prove to be adequate for ultra-shallow junctions due to dopant spread by transient-enhanced-diffusion (TED) [2,3] and boron-enhanced-diffusion (BED) [4,5]. Previously, we have shown that ultra-shallow p+ layers in Si can be formed using low temperature molecular beam epitaxy (LTMBE) [6-8]. For junction depths of 20 nm or less, the sheet resistance (ohm/square) obtained with LTMBE was an order of magnitude less than that predicted with the use of ion implantation. In this paper we apply SiGe barrier layers, to reduce B diffusion during the activation of p+ shallow doped layers formed by low energy implantation and spike annealing. EXPERIMENTAL All structures began with a growth by molecular beam epitaxy (MBE) on Si (100) n-type (3 – 7 Ω-cm) substrates. The Si and Ge molecular beams were obtained from elemental sources in electron gun evaporators. Prior to entry into the MBE growth system the Si substrates were cleaned using a procedure which resulted in a stable, hydrogen-terminated surface. The growth was initiated by heating the Si substrate to 650 oC to remove the surface hydrogen and then depositing an undoped Si buffer layer. The samples were grown at 0.1 nm/s. They were
C4.11.2
composed of 120 nm Si buffer layer gr
Data Loading...
