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NOVEL AMORPHOUS SILICON THIN-FILM TRANSISTORS FOR USE IN LARGE-AREA MICROELECTRONICS M. HACK , J. G. SHAW and M. SHUR* Xerox Palo Alto Research Center, 3333 Coyote Hill Rd, Palo Alto, CA 94304 * Dept. of Electrical Engineering, University of Minnesota, Minneapolis, MN 55455

ABSTRACT In this paper we describe the design and operation of two novel types of amorphous silicon thin-film transistors and outline their application in large-area microelectronics. We first consider a high voltage transistor that can modulate a source-drain voltage in excess of 400 volts by applying low voltages to a controlling electrode covering a small portion of the channel near to the source. Secondly, for high-current output and moderately high voltage applications, we have fabricated vertical amorphous silicon transistors with channel lengths much smaller than the lithographic minimum feature size used in their fabrication. We show the design of both these new transistors together with their physics of operation and give results of output characteristics. The integration of low and high voltage transistors into large-area circuits has enabled us to develop new applications for amorphous silicon in printing, input scanning and electronic copying. Page-wide arrays of both ionographic and electrographic printers have been fabricated. By combining amorphous silicon photodiodes with transistor arrays, we have made high resolution document scanners and copiers with directly coupled print and sensor elements. The ability to fabricate short channel vertical transistors offers the potential to further increase the speed and resolution of these large-area circuits.

INTRODUCTION Amorphous silicon devices have now been used extensively in numerous largearea microelectronic applications, such as flat-panel displays [1,21, page-wide document scanners [3,4] and printer heads [5]. Although the technology was initially developed primarily for photovoltaics, the microelectronic applications of amorphous silicon are becoming increasingly important. Amorphous silicon devices are ideally suited for use in large area arrays because of the low deposition temperatures involved in their fabrication and the availability of large-area deposition and lithographic equipment. Since the first report of an amorphous silicon field-effect transistor in 1979 by LeComber et al [6], there has been rapid progress in both the performance and stability of these devices together with the development of new device configurations. The aim of this paper is to consider the performance of a range of novel amorphous silicon devices with particular emphasis being placed on those characteristics desirable for large-area microelectronic applications. As stated above, the first amorphous silicon transistor [61 was an n-channel accumulation mode field-effect device. The performance of this device is strongly determined by the properties of amorphous silicon, in particular the distributions of localized tail states near both the valence and conduction band edges. Although the electron