Effects of Structural Properties of Hf-Based Gate Stack on Transistor Performance
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Effects of Structural Properties of Hf-Based Gate Stack on Transistor Performance G. Bersuker, J. H. Sim, C. D. Young, R. Choi, B. H. Leea, P. Lysaght, G. A. Brown, P. M. Zeitzoff, M. Gardnerb, R. W. Murtoc and H. R. Huff On assignment from aIBM, bAMD, cTI International SEMATECH Abstract Electron traps in ALD and MOCVD HfO2 and HfSiO high-k dielectrics were investigated using both conventional DC and pulse measurements. It was found that the traps in the gate stack could be associated with defects of different activation energies and capture cross-sections. This points to potentially different origins of the electrically active defects, which can be either intrinsic or process-related. Structural non-uniformity of the high-k film, associated with grain formation and phase separation, may lead to variation of electrical properties of the gate dielectric along the transistor channel. Effects of such dielectric nonuniformity, as well as electron trapping, on the measured transistor mobility were evaluated. Introduction Aggressive transistor scaling required to achieve higher drive current calls for an equivalent electrical thickness (EOT) of the gate dielectric less than 1 nm as well as a low gate leakage current [1]. These conditions cannot be supported by the conventional SiO2 dielectric. On the other hand, transistors built with a high-k gate dielectric, which can provide both low EOT and low leakage current, often exhibit low drive currents. In this study, we analyze several structural features of the high-k films, which may contribute to the degradation of transistor performance. Unlike a conventional SiO2 dielectric, where electronic polarization plays the major role, the most important contribution to the value of dielectric constant in high-k materials comes from the dipole-active displacements of the transition metal ions facilitated by their d-electrons [2]. The chemical bonding involving d-electrons leads to high vulnerability of the high-k dielectrics to the formation of structural defects during the deposition process. These atomic defects [3] may be a source of both fixed charges and electron traps [3]. In addition, due to high diffusivity of various species in metal oxides, a post high-k deposition processing, in particular, gate electrode deposition, may introduce contaminants, which may be electrically active. Even a rather small density of electrical defects, in the range of 1018 cm-3, which is difficult to detect with the majority of the physical analysis methods, can noticeably affect transistor characteristics. Another important feature of the high-k materials is their polycrystalline structure, the formation of which is also facilitated by the d-electrons. The size of the crystal grains may vary depending on the deposition method and post-deposition processing, and usually is on the order of 5 nm to 10 nm [4] (although recent results have indicated that grain sizes may reach 50nm or larger). The grain structure of the gate dielectric leads to non-uniformity of electrical characteristics al
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