Design and Analog Performance Analysis of Charge-Plasma Based Cylindrical GAA Silicon Nanowire Tunnel Field Effect Trans
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ORIGINAL PAPER
Design and Analog Performance Analysis of Charge-Plasma Based Cylindrical GAA Silicon Nanowire Tunnel Field Effect Transistor Naveen Kumar 1
&
Ashish Raman 1
Received: 6 August 2019 / Accepted: 12 December 2019 # Springer Nature B.V. 2019
Abstract Due to the rigorous practice of scaling down the device technology, certain factors such as proper electrostatic controlling of the channel, dopingless substrate, and low thermal budget at the nanoscale are the keys to designing better, efficient and costeffective semiconductor devices. In this paper, a Charge-Plasma (CP) based Gate-All-Around (GAA) Silicon Nanowire Tunnel Field Effect Transistor (NWTFET) is proposed. Charge-Plasma technique is used to induce electron and hole concentration within the drain/source regions respectively by depositing layers of metals with specific work functions. The RF and analog performance of Dopingless Gate-All-Around Silicon Nanowire Tunnel Field Effect Transistor (DL-GAA-NWTFET) are investigated and compared with Junctionless Gate-All-Around Silicon Nanowire Tunnel Field Effect Transistor (JL-GAANWTFET) and Conventional Gate-All-Around Silicon Nanowire Tunnel Field Effect Transistor (C-GAA-NWTFET). The RF/Analog performance parameters such as Unity Gain Frequency (fT), Total Gate Capacitance (Cgg), Intrinsic Gain (Av), Early Voltage (VEA), Output Transconductance (gds), Transconductance to Gain Factor (TGF) and Transconductance (gm) are analyzed, which shows the enhanced output characteristics of the DL-GAA-NWTFET compared to JL-GAA-NWTFET and CGAA-NWTFET. DL-GAA-NWTFET also provides two-order high ON-state current to the OFF-state current ratio (ION/IOFF) with an enhancement of the other sensing parameters. Keywords Charge-plasma . Junctionless . Dopingless . Silicon nanowire . Tunnel FET
1 Introduction Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) is a most preferred device for over a decade for integrating circuits. With the constant need of smaller devices [1] for higher packaging density, MOSFETs devices get affected by Short Channel Effects (SCEs) [2], which in turn deteriorates the performance of the overall designed circuitry. Limiting Subthreshold Swing (SS) [2–4], Drain Induced Barrier Lowering (DIBL) [3], low Early Voltage (VEA) leading to high OFF-state current (IOFF), low Intrinsic Gain (Av), low Unity Gain Frequency (fT) and low ON-state current to * Naveen Kumar [email protected] Ashish Raman [email protected] 1
Department of Electronics and Communications, Dr. B. R. Ambedkar National Institute of Technology, Jalandhar 144011, India
OFF-state current ratio (ION/IOFF) makes the device less suitable for sensing and analog applications [5, 6]. Such problems are tackled with the use of the next best alternative device i.e. Tunnel Field Effect Transistors (TFETs). TFETs have a low subthreshold swing, IOFF, and High ION/IOFF [7]. These prominent features of TFET are shadowed by the lower ION [8]. Complex fabrication steps are needed due to the stringent condition of abrupt doping makes the
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