Ultra-Low Energy Ion Implantation of Si into HfO 2 and HfSiO-based Structures for Non Volatile Memory Applications
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1250-G01-07
Ultra-Low Energy Ion Implantation of Si into HfO2 and HfSiO-based Structures for Non Volatile Memory Applications F. Gloux1, P. E. Coulon1, J. Groenen1, S. Schamm-Chardon1, G. Ben Assayag1, B. Pecassou1, A. Slaoui2, B. Sahu2, M. Carrada2, S. Lhostis3 and C. Bonafos1 1 CEMES-CNRS and Université de Toulouse, nMat group, BP 94347, 31055 Toulouse cedex 4, France 2 InESS – CNRS, 23 rue du Loess, 67037 Strasbourg, France 3 ST Microelectronics, 850 rue Jean Monnet, 38926 Crolles, France
ABSTRACT The fabrication of Si nanocrystals (NCs) in multilayer structures based on HfO2 and alloys for memory applications is carried out using an innovative method, the ultra-low energy (1 keV) ion implantation followed by a post-implantation annealing. Si+ ions are implanted into SiO2 thin layers deposited on top of thin HfO2-based layers. After annealing at high temperature (1050°C), the implantation leads to the formation of a two dimensional array of Si NCs at a distance from the surface larger than expected, due to an anomalous oxidation of the implanted Si. Nevertheless, the best memory windows are obtained at lower thermal budget, when no nanocrystals are present in the layer. This suggests that electrical measurements should always be correlated to structural characterization in order to understand where charge storage occurs. INTRODUCTION Nanocrystal memory (NCM) devices are competitive candidates for extending further the scalability of Flash-type memories [1-2]. Particularly, the fabrication of NCs into high-k dielectric matrices instead of SiO2 has retained particular attention for achieving NCMs with low programming voltages and improved data retention. Among the different high-k materials under investigation, HfO2 and its alloys are considered as very promising candidates for the integration in ultra-scaled commercial devices. Although promising device results using Si NCs embedded in HfO2 gate dielectrics have been recently presented [3], the fabrication of semiconducting NCs in high-k materials does not remain straightforward because of diffusion and oxidation problems [4]. We have extensively used ultra-low energy ion implantation (ULE-II) to synthesize single planes of Si NCs embedded in very thin (5 to 10 nm) oxide layers. The depth-location of these two-dimensional (2D) arrays of particles below the surface can be controlled with nanometer precision by tuning the implantation energy while their size and density can be controlled by varying the dose and annealing conditions [5]. These parameters were finally optimized to fabricate non volatile memory devices with improved characteristics [2]. Recently, this approach was extended to synthesize a plane of Si NCs within thin HfO2 and HfSiO layers deposited by metalorganic chemical vapour deposition (MOCVD) on Si wafers. A structural study by transmission electron microscopy (TEM) techniques revealed the complete oxidation of the implanted Si in the HfO2-based layers while Si NCs were formed in the interfacial SiO2 layer [6]. In this paper we investigate alter
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