6-T and 7-T SRAM CELL Design Using Doping-Less Charge Plasma TFET
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ORIGINAL PAPER
6-T and 7-T SRAM CELL Design Using Doping-Less Charge Plasma TFET Harsimran Kaur 1 & R. K. Sarin 1 & Sunny Anand 2
&
S. Intekhab Amin 3
Received: 1 September 2020 / Accepted: 15 September 2020 # Springer Nature B.V. 2020
Abstract Charge plasma based doping-less tunnel FETs (DLTFETs) are attracting attention for providing reduced leakage currents and high ION/IOFF ratio. In this work, a new GaAs based gate stack charge plasma doping-less tunnel FET (GaAs based GSDLTFET) has been proposed. The simulation results show that the proposed device gives higher ION/IOFF ratio in comparison to DLTFETs due to high mobility of the GaAs substrate. Various SRAM circuits have been designed and analyzed using DLTFET and GaAs based GSDLTFET viz. 6 T standard SRAM, 6 T TFET SRAM and 7 T TFET SRAM. The circuit analysis shows that SRAM cell designed using GaAs based GSDLTFET provides better noise margins in comparison to DLTFET based SRAMs due to high ION/IOFF ratio. Standby leakage power is also reduced in DLTFETs as compared to CMOS. Due to the enhanced noise margins and reduced leakage power our proposed GaAs based GSDLTFET can be used to design energy- efficient memory devices. Keywords Band to band tunneling . Charge plasma based doping-less TFET . SRAM analysis
1 Introduction Continuous device miniaturization of the MOSFETs to sub nanometer regime has led to several short channel effects (SCEs) such as hot electron effect, drain induced barrier lowering, gate induced drain leakage and threshold voltage roll off [1–4]. These SCEs affect the performance of the device by reducing the control of gate over the channel. Various novel devices have been developed to overcome these SCEs viz. single electron transistor, carbon nano tubes and finFETs [5–7]. Tunnel field effect transistor (TFET) whose operation relies on the phenomenon of band to band tunneling (BTBT) has emerged out as a promising candidate and has attracted attention for providing low leakage currents and steep sub-
* Sunny Anand [email protected] 1
National Institute of Technology, Jalandhar, Punjab 144011, India
2
Amity University, Noida, Uttar Pradesh 201313, India
3
Jamia Millia Islamia, New Delhi, Delhi 110025, India
threshold slope (SS) [8–11]. In spite of this, ON state current in TFETs is low due to poor BTBT efficiency which can be improved by using narrow band gap materials, hetero structures, high-κ materials and pocketing [12–16]. The basic problem pertaining to the fabrication of TFET is that it requires expensive thermal annealing process which increases the thermal budget of the device. Recently, charge plasma based TFETs are captivating broad attention because of its viability to eliminate the need of conventional doping and it cuts down the thermal budget of the device [17–20]. In charge plasma concept, source and drain regions are induced by applying appropriate work function to the metal electrodes. Reduction in leakage currents are observed in the charge plasma based doping-less TFETs (DLTFET) due to its immunity towar
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